Product Information

PSMN006-20K,518

PSMN006-20K,518 electronic component of NXP

Datasheet
Trans MOSFET N-CH 20V 32A 8-Pin SO T/R

Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2500: USD 0.744 ea
Line Total: USD 1860

0 - Global Stock
MOQ: 2500  Multiples: 2500
Pack Size: 2500
     
Manufacturer
Product Category
Packaging
Channel Mode
Continuous Drain Current
Gate-Source Voltage Max
Power Dissipation
Mounting
Drain-Source On-Res
Operating Temp Range
Package Type
Pin Count
Polarity
Type
Number Of Elements
Operating Temperature Classification
Drain-Source On-Volt
Rad Hardened
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PSMN006-20K N-channel TrenchMOS SiliconMAX ultra low level FET Rev. 01 17 November 2009 Product data sheet 1. Product profile 1.1 General description SiliconMAX ultra low level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Low conduction losses due to low Suitable for very low gate drive on-state resistance sources 1.3 Applications Computer motherboards Switched-mode power supplies DC-to-DC convertors 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage T 25 C; T 150 C - - 20 V DS j j I drain current T =25C; V =4.5V; --32 A D sp GS see Figure 1 and 3 P total power T =25C; see Figure 2 --8.3 W tot sp dissipation Dynamic characteristics Q gate-drain charge V = 2.5 V; I =30A; - 13.2 - nC GD GS D V =10V; T =25C; DS j see Figure 11 Static characteristics R drain-source V = 2.5 V; I =5A; -4.8 5.7 m DSon GS D on-state resistance T =25C; see Figure 9 and 10 j V = 1.8 V; I =5A; -5.7 8.2 m GS D T = 25 C; see Figure 10 j V = 4.5 V; I =5A; -4.2 5 m GS D T =25C; see Figure 9 and 10 jNexperia PSMN006-20K N-channel TrenchMOS SiliconMAX ultra low level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source 8 5 D 2S source 3S source G 4G gate mbb076 S 5D drain 1 4 6D drain SOT96-1 (SO8) 7D drain 8D drain 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PSMN006-20K SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage T 25 C; T 150 C - 20 V DS j j V gate-source voltage -10 10 V GS I drain current T =25 C; V = 4.5 V; see Figure 1 and 3 -32 A D sp GS I peak drain current T =25 C; t 10 s; pulsed; see Figure 3 -60 A DM sp p P total power dissipation T =25 C; see Figure 2 -8.3 W tot sp T storage temperature - 150 C stg T junction temperature -55 150 C j Source-drain diode I source current T =25C - 7.5 A S sp I peak source current T =25 C; t 10 s; pulsed - 30 A SM sp p Nexperia B.V. 2017. All rights reserved PSMN006-20K_1 Product data sheet Rev. 01 17 November 2009 2 of 12

Tariff Desc

8541.21.00 16 No - - With a dissipation rate of less than 1 W Free

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