Product Information

CAT64LC40WI-T3

CAT64LC40WI-T3 electronic component of ON Semiconductor

Datasheet
4K-Bit SPI Serial EEPROM

Manufacturer: ON Semiconductor
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Price (USD)

1: USD 0.0634 ea
Line Total: USD 0.06

0 - Global Stock
MOQ: 1  Multiples: 3000
Pack Size: 3000
Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 1
Multiples : 3000

Stock Image

CAT64LC40WI-T3
ON Semiconductor

1 : USD 0.0634
3001 : USD 0.0355

0 - WHS 2


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 3000
Multiples : 3000

Stock Image

CAT64LC40WI-T3
ON Semiconductor

3000 : USD 0.0634
3001 : USD 0.0355

     
Manufacturer
Product Category
RoHS - XON
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CAT64LC40 4K-Bit SPI Serial EEPROM DESCRIPTION FEATURES The CAT64LC40 is a 4K-bit Serial EEPROM which is SPI bus compatible configured as 256 registers by 16 bits. Each register can Low power CMOS technology be written (or read) serially by using the DI (or DO) pin. 2.5V to 6.0V operation The CAT64LC40 is manufactured using Catalysts advanced CMOS EEPROM floating gate technology. It Self-timed write cycle with auto-clear is designed to endure 1,000,000 program/erase cycles Hardware reset pin and has a data retention of 100 years. The device is Hardware and software write protection available in 8-pin DIP, SOIC and TSSOP packages. Commercial, industrial and automotive temperature ranges Power-up inadvertant write protection RDY/BSYBSYBSYBSYBSY pin for end-of-write indication 1,000,000 program/erase cycles 100 year data retention PIN CONFIGURATION SOIC Package (J, W) TSSOP Package (U, Y) DIP Package (P, L) 1 8 1 8 CS V RDY/BUSY RESET 1 8 CS V CC CC 2 7 2 7 SK RDY/BUSY V GND SK 2 7 RDY/BUSY CC 3 6 3 6 DI 3 6 RESET DI RESET CS DO DO GND 4 5 4 5 4 5 DO GND SK DI SOIC Package (S, V) TSSOP Package (UR, YR) 1 8 CS V 1 8 RDY/BUSY RESET CC 2 7 SK RDY/BUSY V 2 7 GND CC 3 6 CS 3 6 DO DI RESET SK DI 4 5 4 5 DO GND PIN FUNCTIONS BLOCK DIAGRAM V GND CC Pin Name Function CS Chip Select MEMORY ARRAY ADDRESS SK Clock Input DECODER 256 x 16 DI Serial Data Input DATA DO Serial Data Output REGISTER OUTPUT DI V +2.5V to +6.0V Power Supply CC BUFFER MODE DECODE RESET LOGIC GND Ground CS RESET Reset CLOCK DO RDY/BUSY SK GENERATOR RDY/BUSY Ready/BUSY Status 2008 SCILLC. All rights reserved. Doc. No. MD-1021, Rev. E 1 Characteristics subject to change without notice.CAT64LC40 ABSOLUTE MAXIMUM RATINGS* *COMMENT Temperature Under Bias ................. 55C to +125C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Storage Temperature....................... 65C to +150C These are stress ratings only, and functional operation of Voltage on any Pin with the device at these or any other conditions outside of those (1) Respect to Ground ............ 2.0V to +VCC +2.0V listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for V with Respect to Ground ............... 2.0V to +7.0V CC extended periods may affect device performance and Package Power Dissipation reliability. Capability (Ta = 25C)................................... 1.0W Lead Soldering Temperature (10 secs) ............ 300C (2) Output Short Circuit Current ........................ 100 mA RELIABILITY CHARACTERISTICS Symbol Parameter Min. Max. Units (3) N Endurance 1,000,000 Cycles/Byte END (3) T Data Retention 100 Years DR (3) V ESD Susceptibility 2000 Volts ZAP (3)(4) I Latch-Up 100 mA LTH CAPACITANCE (T = 25C, f= 1.0 MHz, V =6.0V) A CC Symbol Test Max. Conditions Units (3) C Input/Output Capacitance (DO, RDY/BSY)8V = 0V pF I/O I/O (3) C Input Capacitance (CS, SK, DI, RESET) 6 V = 0V pF IN IN Note: (1) The minimum DC input voltage is 0.5V. During transitions, inputs may undershoot to 2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is V +0.5V, which may overshoot to V +2.0V for periods of less than 20 ns. CC CC (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1V to V +1V. CC 2008 SCILLC. All rights reserved. Doc. No. MD-1021, Rev. E 2 Characteristics subject to change without notice.

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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