ESD8024 ESD Protection Diode Low Capacitance ESD Protection Diode for High Speed Data Line The ESD8024 surge protection is designed specifically to protect www.onsemi.com Low Voltage Differential Signals (LVDS) for LCD panels. Ultralow capacitance and low ESD clamping voltage make this device an ideal MARKING solution for protecting voltage sensitive data lines. The integrated 24 DIAGRAM lines of protection offers a simplified solution with premier performance for LVDS applications. 8024 ALYW Features QFN24 CASE 485L Full Function LVDS Solution 4 pF Max, I/O to GND 8024 = Specific Device Code Protection for the Following IEC Standards: A = Assembly Location IEC 6100042 (ESD) 8 kV (Contact) L = Wafer Lot IEC6100045 (Lightning) 20 A (8/20 s) Y = Year W = Work Week UL Flammability Rating of 94 V0 = PbFree Package This is a PbFree Device (Note: Microdot may be in either location) Typical Applications LVDS ORDERING INFORMATION LCD Panel TCON Device Package Shipping ESD8024MNTAG QFN24 4000 / Tape & Reel MAXIMUM RATINGS (T = 25C unless otherwise noted) J (PbFree) Rating Symbol Value Unit For information on tape and reel specifications, Operating Junction Temperature Range T 55 to +125 C including part orientation and tape sizes, please J refer to our Tape and Reel Packaging Specification Storage Temperature Range T 55 to +150 C stg Brochure, BRD8011/D. Lead Solder Temperature T 260 C L Maximum (10 Seconds) IEC 6100042 Contact (ESD) ESD 30 kV IEC 6100042 Air (ESD) ESD 30 kV Maximum Peak Pulse Current I 20 A pp 8/20 s T = 25C A Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: October, 2017 Rev. 2 ESD8024/DESD8024 Pin 22 Pin 23 Pin 24 Pin 1 Pin 2 Pin 3 Center Pad Figure 1. Pin Schematic ELECTRICAL CHARACTERISTICS I (T = 25C unless otherwise noted) A I PP Symbol Parameter R V Working Peak Voltage DYN RWM I Maximum Reverse Leakage Current V R RWM V V BR V Breakdown Voltage I V V V C RWM HOLD BR T I R V C I Test Current I T T I V Holding Reverse Voltage HOLD HOLD I Holding Reverse Current HOLD R DYN R Dynamic Resistance DYN I PP I Maximum Peak Pulse Current PP V = V + (I * R ) C HOLD PP DYN V Clamping Voltage I C PP V = V + (I * R ) C HOLD PP DYN ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise specified) A Parameter Symbol Conditions Min Typ Max Unit Reverse Working Voltage V All Pins (124) to GND (Note 1) 2.5 V RWM Forward Voltage V I = 10 mA, GND to All Pins (124) 0.5 0.85 1.1 V F F Breakdown Voltage V I = 1 mA, All Pins (124) to GND 5.5 7.0 9.0 V BR T Reverse Leakage Current I V = 2.5 V, All Pins (124) to GND 0.5 A R RWM Holding Reverse Voltage V I/O Pin to GND 1 1.5 V HOLD Holding Reverse Current I I/O Pin to GND 50 mA HOLD Clamping Voltage V 4.0 V I = 1 A, All Pins (124) to GND (8/20 s pulse) C PP Clamping Voltage V I = 10 A, All Pins (124) to GND (8/20 s pulse) 7.0 V C PP Clamping Voltage V I = 15 A, All Pins (124) to GND (8/20 s pulse) 8.0 V C PP Clamping Voltage V IEC6100042, 8 kV Contact See Figures 2 and 3 V C Junction Capacitance C V = 0 V, f = 1 MHz between I/O Pins 2.0 pF J R Junction Capacitance C V = 0 V, f = 1 MHz between I/O Pins and GND 4.0 pF J R 1. Surge protection devices are normally selected according to the working peak reverse voltage (V ), which should be equal or greater RWM than the DC or continuous peak operating voltage level. www.onsemi.com 2 =