ESD8116 ESD Protection Diode Low Capacitance Array for High Speed Data Lines The ESD8116 surge protection is specifically designed to protect www.onsemi.com USB 3.0/3.1 interfaces from ESD. Ultralow capacitance and low ESD clamping voltage make this device an ideal solution for MARKING protecting voltage sensitive high speed data lines. The flowthrough DIAGRAM style package allows for easy PCB layout and matched trace lengths necessary to maintain consistent impedance between high speed UDFN8 6CM differential lines. CASE 517CX Features 6C = Specific Device Code M = Date Code Low Capacitance (0.35 pF Max, I/O to GND) = PbFree Package Protection for the Following IEC Standards: (Note: Microdot may be in either location) IEC 6100042 (Level 4) Low ESD Clamping Voltage PIN CONFIGURATION These Devices are PbFree, Halogen Free/BFR Free and are RoHS I/O I/O I/O I/O Compliant 8 7 6 5 Typical Applications USB 3.0/3.1 Display Port 12 3 4 I/O GND GND I/O MAXIMUM RATINGS (T = 25C unless otherwise noted) J Rating Symbol Value Unit ORDERING INFORMATION Operating Junction Temperature Range T 55 to +125 C J Device Package Shipping Storage Temperature Range T 55 to +150 C stg ESD8116MUTAG UDFN8 3000 / Tape & Reel Lead Solder Temperature T 260 C L (PbFree) Maximum (10 Seconds) For information on tape and reel specifications, IEC 6100042 Contact (ESD) ESD 15 kV including part orientation and tape sizes, please IEC 6100042 Air (ESD) ESD 15 kV refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: November, 2017 Rev. 1 ESD8116/DESD8116 I/O I/O I/O I/O I/O I/O Pin 1 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pins 2, 3 Note: Common GND Only Minimum of 1 GND connection required = Figure 1. Pin Schematic www.onsemi.com 2