Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductors system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore ( ), the underscore ( ) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore ( ). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild questions onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductors product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMS3686S PowerTrench Power Stage January 2012 FDMS3686S PowerTrench Power Stage Asymmetric Dual N-Channel MOSFET Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max r = 8 m at V = 10 V, I = 13 A dual PQFN package. The switch node has been internally DS(on) GS D connected to enable easy placement and routing of synchronous Max r = 11 m at V = 4.5 V, I = 11 A DS(on) GS D buck converters. The control MOSFET (Q1) and synchronous Q2: N-Channel SyncFET (Q2) have been designed to provide optimal power Max r = 2.8 m at V = 10 V, I = 23 A DS(on) GS D efficiency. Max r = 3.8 m at V = 4.5 V, I = 21 A DS(on) GS D Applications Low inductance packaging shortens rise/fall times, resulting in lower switching losses Computing MOSFET integration enables optimum layout for lower circuit Communications inductance and reduced switch node ringing General Purpose Point of Load RoHS Compliant Notebook VCORE G1 D1 D1 D1 D1 PHASE (S1/D2) G2 S2 S2 S2 Top Bottom Power 56 MOSFET Maximum Ratings T = 25 C unless otherwise noted A Symbol Parameter Q1 Q2 Units V Drain to Source Voltage 30 30 V DS V Gate to Source Voltage (Note 3) 20 20 V GS Drain Current -Continuous (Package limited) T = 25 C 30 55 C -Continuous (Silicon limited) T = 25 C 54 123 C I A D 1a 1b -Continuous T = 25 C 13 23 A -Pulsed 40 100 4 4 E Single Pulse Avalanche Energy 40 60 mJ AS 1a 1b Power Dissipation for Single Operation T = 25 C 2.2 2.5 A P W D 1c 1d Power Dissipation for Single Operation T = 25 C 1.0 1.0 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics 1a 1b R Thermal Resistance, Junction to Ambient 57 50 JA 1c 1d R Thermal Resistance, Junction to Ambient 125 120 C/W JA R Thermal Resistance, Junction to Case 3.5 2.0 JC Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity 22CA FDMS3686S Power 56 13 12 mm 3000 units F10CC 1 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMS3686S Rev.C1