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FDMS9620S Dual N-Channel PowerTrench MOSFET May 2014 FDMS9620S Dual N-Channel PowerTrench MOSFET Q1: 30V, 16A, 21.5m Q2: 30V, 18A, 13m Features Q1: N-Channel General Description Max r = 21.5m at V = 10V, I = 7.5A DS(on) GS D This device includes two specialized MOSFETs in a unique dual Max r = 29.5m at V = 4.5V, I = 6.5A DS(on) GS D Power 56 package. It is designed to provide an optimal Q2: N-Channel Synchronous Buck power stage in terms of efficiency and PCB Max r = 13m at V = 10V, I = 10A DS(on) GS D utilization. The low switching lossHigh Sid MOSFET is Max r = 17m at V = 4.5V, I = 8.5A complemented by a Low Conduction Loss Low Sid SyncFET. DS(on) GS D Low Qg high side MOSFET Applications Low r low side MOSFET Synchronous Buck Converter for: DS(on) Thermally efficient dual Power 56 package Notebook System Power Pinout optimized for simple PCB design General Purpose Point of Load RoHS Compliant G1G1 D1D1 S2 D1 5 4 D1D1 D1D1 D1D1 S2 D1 6 3 S1/S1/DD22 G2G2 S2 D1 7 2 S2S2 S2S2 G2 G1 8 1 S2S2 Power 56 MOSFET Maximum Ratings T = 25C unless otherwise noted A Symbol Parameter Q1 Q2 Units V Drain to Source Voltage 30 30 V DS V Gate to Source Voltage 20 20 V GS Drain Current -Continuous T = 25C 16 18 C I -Continuous T = 25C (Note 1a) 7.5 10 A D A -Pulsed 60 60 Power Dissipation for Single Operation T = 25C (Note 1a) 2.5 A P W D T = 25C (Note 1b) 1 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 8.2 3.1 JC R Thermal Resistance, Junction to Ambient (Note 1a) 50 C/W JA R Thermal Resistance, Junction to Ambient (Note 1b) 120 JA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS9620S FDMS9620S Power 56 13 12mm 3000 units 1 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMS9620S Rev.D3