NTLUD3A50PZTAG ON Semiconductor

NTLUD3A50PZ MOSFET Power, Dual, P-Channel, Cool, UDFN, 2.0x2.0x0.55 mm -20 V, -5.6 A NTLUD3A50PZ 2. Surface-mounted on FR4 board using the minimum recommended pad size 2 of 30 mm , 1 oz. Cu based on both FETs on. THERMAL RESISTANCE RATINGS Parameter Symbol Max Units Junction-to-Ambient Steady State (Note 3) R 91 C/W JA Junction-to-Ambient t 5 s (Note 3) R 57 JA Junction-to-Ambient Steady State min Pad (Note 4) R 228 JA ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise specified) J Parameter Symbol Test Condition Min Typ Max Units OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage V V = 0 V, I = 250 A 20 V (BR)DSS GS D Drain-to-Source Breakdown Voltage V /T I = 250 A, ref to 25C 13 mV/C (BR)DSS J D Temperature Coefficient Zero Gate Voltage Drain Current I V = 0 V, T = 25C 1.0 A DSS GS J V = 20 V DS Gate-to-Source Leakage Current I V = 0 V, V = 5.0 V 5.0 A GSS DS GS ON CHARACTERISTICS (Note 5) Gate Threshold Voltage V V = V , I = 250 A 0.4 1.0 V GS(TH) GS DS D Negative Threshold Temp. Coefficient V /T 3.0 mV/C GS(TH) J Drain-to-Source On Resistance R V = 4.5 V, I = 4.0 A 37 50 m DS(on) GS D V = 2.5 V, I = 3.0 A 46 70 GS D V = 1.8 V, I = 2.0 A 63 115 GS D V = 1.5 V, I = 1.0 A 86 175 GS D Forward Transconductance g V = 5.0 V, I = 3.0 A 16 S FS DS D CHARGES AND CAPACITANCES Input Capacitance C 920 pF ISS V = 0 V, f = 1 MHz, GS Output Capacitance C 85 OSS V = 15 V DS Reverse Transfer Capacitance C 80 RSS nC Total Gate Charge Q 10.4 G(TOT) Threshold Gate Charge Q 0.5 G(TH) V = 4.5 V, V = 15 V GS DS I = 3.0 A Gate-to-Source Charge Q D 1.2 GS Gate-to-Drain Charge Q 3.0 GD SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6) Turn-On Delay Time t 7.0 ns d(ON) Rise Time t 12 r V = 4.5 V, V = 15 V, GS DD I = 3.0 A, R = 1 Turn-Off Delay Time t D G 39 d(OFF) Fall Time t 30 f DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD T = 25C 0.67 1.0 V J V = 0 V, GS I = 1.0 A S T = 125C 0.56 J Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq 1 oz including traces) based on both FETs on. 2 4. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm , 1 oz. Cu based on both FETs on. 5. Pulse Test: pulse width 300 s, duty cycle 2%. 6. Switching characteristics are independent of operating junction temperatures.