EK4312-13

Product Specification PE4312 UltraCMOS RF Digital Step Attenuator 6-bit, 31.5 dB, 1 MHz4 GHz Product Description The PE4312 is a 50, HaRP technology-enhanced 6-bit Features RF Digital Step Attenuator (DSA) designed for use in 3G/4G Attenuation: 0.5 dB steps to 31.5 dB wireless infrastructure and other high performance RF applications. Safe attenuation state transitions Monotonicity: 0.5 dB up to 4 GHz This DSA is a pin-compatible upgraded version of the High attenuation accuracy PE4302 with higher linearity, improved attenuation accuracy and faster switching speed. An integrated digital control (0.10 + 1% x Atten) 1 GHz interface supports both serial and parallel programming of (0.15 + 2% x Atten) 2.2 GHz the attenuation, including the capability to program an initial (0.15 + 8% x Atten) 4 GHz attenuation state at power-up. High linearity: +59 dBm IIP3 Covering a 31.5 dB attenuation range in 0.5 dB steps, it Wide power supply range of 2.35.5V maintains high linearity and low power consumption from 1.8V control logic compatible 1 MHz through 4 GHz. PE4312 also features an external negative supply option, and is offered in a 20-lead 4 4 mm 105 C operating temperature QFN package. In addition, no external blocking capacitors Programming modes are required if 0 VDC is present on the RF ports. Direct parallel The PE4312 is manufactured on Peregrines UltraCMOS Latched parallel process, a patented variation of silicon-on-insulator (SOI) Serial technology on a sapphire substrate. Unique power-up state selection Peregrines HaRP technology enhancements deliver high Pin compatible to PE4302, PE4305 linearity and excellent harmonics performance. It is an and PE4306 innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 2. Package Type 20-lead 4 4 mm QFN Figure 1. Functional Schematic Diagram Switched Attenuator Array RF Input RF Output Parallel Control 6 Control Logic Interface 3 Serial Control 2 Power-Up Control DOC-02132 Document No. DOC-81482-2 www.psemi.com 2017 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 13 PE4312 Product Specification Table 1. Electrical Specifications 25 C (Z = Z = 50), unless otherwise noted S L 1 2 Normal Mode : V = 3.3V, V = 0V or Bypass Mode : V = 3.3V, V = 3.3V DD SS EXT DD SS EXT Parameter Condition Frequency Min Typ Max Unit Operation frequency 1 4000 MHz Attenuation range 0.5 dB step 031.5 dB 1 MHz<1 GHz 1.3 1.5 dB Insertion loss 12.2 GHz 1.5 1.8 dB 2.24 GHz 2.1 2.3 dB 1 MHz1 GHz (0.10 + 1% of atten setting) dB Attenuation error Any bit or bit combination 1<2.2 GHz (0.15 + 2% of atten setting) dB 2.24 GHz (0.15 + 8% of atten setting) dB Return loss 12.2 GHz 14 18 dB (input or output port) 2.24 GHz 10 17 3 Input 0.1dB compression point 1 MHz4 GHz 30 dBm Input IP3 Two tones at +18 dBm, 10 kHz spacing 1950 MHz 59 dBm Switching time 50% CTRL to 90% or 10% RF 500 800 ns Notes: 1. Normal mode: single external positive supply used. 2. Bypass mode: both external positive supply and external negative supply used. 3. The input 0.1dB compression point is a linearity figure of merit. Refer to Table 5 for the operating RF input power (50). 2017 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-81482-2 UltraCMOS RFIC Solutions Page 2 of 13