PE42823 Document Category: Product Specification UltraCMOS SPDT RF Switch, 700 MHz6 GHz Features Figure 1 PE42823 Functional Diagram Excellent single-event peak power handling of 51 dBm LTE ANT (RFC) Exceptional linearity performance across all frequencies Input IP3: 70 dBm Input IP2: 105 dBm TX RRX Extended operating temperature of +105 C (RF1) (R((RF2) 1.8V/3.3V TTL compatible control High ESD performance of 4.5 kV HBM on RF pins CMOS Control to ground Driver and ESD Packaging 16-lead 3 3 0.75 mm QFN CTRL V DD Applications 4G/4.5G wireless infrastructures Pre-5G/5G massive MIMO systems TDD-based RF transceivers Product Description The PE42823 is a HaRP technology-enhanced 50 SPDT RF protection switch designed for use in high power and high performance wireless infrastructure applications such as macrocells supporting frequencies up to 6 GHz. This switch features high linearity, which remains invariant across the full supply range. The PE42823 also features exceptional isolation, fast switching time and is offered in a 16-lead 3 3 0.75 mm QFN package. In addition, no external blocking capacitors are required if 0 VDC is present on the RF ports. The PE42823 is manufactured on Peregrines UltraCMOS process, a patented advanced form of silicon-on- insulator (SOI) technology. Peregrines HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. 2015 2017, Peregrine Semiconductor Corporation. All rights reserved. Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-67417-4 (05/2017) www.psemi.comPE42823 SPDT RF Switch Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE42823 Parameter Condition Min Typ Max Unit Power supply voltage 0.3 5.5 V Voltage on CTRL input 0.3 3.6 V Voltage on LS input 0.3 3.6 V Storage temperature range 65 150 C Input power, avg: Tx mode, 10-second duration, 700 1800 MHz 43 dBm 8dB PAR LTE signal No power applied to off- 18013800 MHz 42.5 dBm terminated port. No hot switching. 38016000MHz 42 dBm ESD voltage HBM: Human body model RF pins to GND 4500 V (MIL-STD 883 Method 3015). All pins 4000 V Charged device model ESD voltage CDM, all pins 1250 V (JEDEC JESD22-C101). Page 2 DOC-67417-4 (05/2017) www.psemi.com