660GILFT Renesas

DATASHEET DIGITAL VIDEO CLOCK SOURCE ICS660 Description Features The ICS660 provides clock generation and conversion for Packaged in 16-pin TSSOP clock rates commonly needed in digital video equipment, Pb-free packaging, RoHS compliant including rates for MPEG, NTSC, PAL, and HDTV. The Clock or crystal input ICS660 uses the latest PLL technology to provide excellent Low phase noise phase noise and long term jitter performance for superior Low jitter synchronization and S/N ratio. Exact (0 ppm) multiplication ratios For audio sampling clocks generated from 27 MHz, use the Power-down control ICS661. Reference clock output available Please contact IDT if you have a requirement for an input and output frequency not included here - we can rapidly modify this product to meet special requirements. Block Diagram VDD (P2) VDD (P3) VDDO VDDR X2 REF Crystal Oscillator X1/REFIN SELIN PLL Clock CLK Synthesis S3:0 4 GND (P13) GND (P6) GND (P5) IDT / ICS DIGITAL VIDEO CLOCK SOURCE 1 ICS660 REV G 051310ICS660 DIGITAL VIDEO CLOCK SOURCE CLOCK SYNTHESIZER Pin Assignment Output Clock Selection Table Input Output S3 S2 S1 S0 Frequency Frequency X1/REFIN 1 16 X2 (MHz) (MHz) VDD 2 REF 15 0000 13.5 74.25 VDD 3 14 VDDR 0001 13.5 74.175824 0010 27 74.25 S0 4 13 GND 0011 27 74.175824 GND 5 12 SELIN 0100 Pass thru Input Freq 0101 74.25 74.175824 GND 6 11 VDDO 0110 74.175824 74.25 S3 7 10 S1 0111 Power down S2 8 9 CLK 1000 16.9344 27 1001 125 106.25 1010 14.3181818 27 16-pin 4.40 mil body, 0.65 mm pitch TSSOP 1011 106.25 125 1100 27.027 27 1101 27 27.027 1110 27 14.3181818 1 1111 27 17.73447205 1 - 0.16 ppm compared to PAL specification Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 X1/REFIN Input Connect this pin to a crystal or clock input 2 VDD Power Power supply for crystal oscillator. 3 VDD Power Power supply for PLL. 4 S0 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 5 GND Power Ground for output stage. 6 GND Power Ground for PLL. 7 S3 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 8 S2 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 9 CLK Output Clock output. 10 S1 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 11 VDDO Power Power supply for output stage. 12 SEL Input Low for clock input, high for crystal. On chip pull-up. 13 GND Power Connect to ground. 14 VDDR Power Power supply for reference output. Ground to turn off REF. 15 REF Output Reference clock output. 16 X2 Input Connect this pin to a crystal. Leave open if using a clock input. IDT / ICS DIGITAL VIDEO CLOCK SOURCE 2 ICS660 REV G 051310