Dual LVCMOS/LVTTL-To-Differential ICS85322I 2.5V/3.3V LVPECL Translator DATASHEET General Description Features TheICS85322IisaDualLVCMOS/LVTTL-to-Differential2.5V/3.3V Two differential 2.5V/3.3V LVPECL outputs LVPECLtranslator.TheICS85322Ihasselectablesingleendedclock Selectable CLK0, CLK1 LVCMOS/LVTTL clock inputs inputs.The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 2.5V / 3.3V LVPECL levels.The CLK0andCLK1canacceptsthefollowinginputlevels:LVCMOSor small outline 8-pin SOIC orTSSOP package makes this device ideal LVTTL for applications where space, high performance and low power are um output frequency: 267MHz Maxim important. Part-to-part skew: 250ps (maximum) 3.3V operating supply voltage (operating range 3.135V to 3.465V) 2.5V operating supply voltage (operating range 2.375V to 2.625V) -40C to 85C ambient operating temperature Lead-free (RoHS 6) packaging Block Diagram Pin Assignment Q0 1 8 V Q0 CLK0 CC nQ0 2 7 CLK0 Q1 3 6 CLK1 Q1 CLK1 nQ1 4 5 V nQ1 EE ICS85322I 8-Lead SOIC 3.90mm x 4.92mm x 1.37mm body package M Package 8-LeadTSSOP 3.0mm x 3.0mm body package G Package TopView ICS85322I REVISION D MARCH 6, 2014 1 2014 Integrated Device Technology, Inc.ICS85322I Data Sheet DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL 2.5V/3.3V LVPECL TRANSLATOR Pin Descriptions and Characteristics Table 1. Pin Descriptions Number Name Type Description 1, 2 Q0, nQ0 Output Differential output pair. LVPECL interface levels. 3, 4 Q1, nQ1 Output Differential output pair. LVPECL interface levels. Power 5V Negative supply pin. EE 6 CLK1 Input Pullup LVCMOS/LVTTL clock input. 7 CLK0 Input Pullup LVCMOS/LVTTL clock input. Power 8V Positive supply pin. CC NOTE: Pullup refers to internal input resistors. SeeTable 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units Input Capacitance 4 pF C IN Input Pullup Resistor 51 k R PULLUP ICS85322I REVISION D MARCH 6, 2014 2 2014 Integrated Device Technology, Inc.