NS SRC(1:0) 48M DATASHEET CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING 932SQ426 General Description Features/Benefits The 932SQ426 is a CK420BQ derivative supporting Non-spread 100MHz outputs/ Supports SRnS PCIe Separate Reference no Spread (SRnS) PCIe clocking architectures architectures. It uses a 25MHz crystal for maximum 64-pin TSSOP and VFQFPN packages maximum space performance and has 100MHz outputs tuned for savings non-spreading applications to provide the most open eye diagram on PCIe links. Key Specifications Cycle to cycle jitter: CPU/SRC/NS SRC/NS SAS < 50ps Recommended Application Phase jitter: PCIe Gen2 <3ps rms CK420BQ for SRnS applications Phase jitter: PCIe Gen3 <1ps rms Phase jitter: QPI 9.6GB/s <0.2ps rms Output Features Phase jitter: NS-SAS <0.4ps rms using raw phase data 11 - HCSL 100MHz outputs for SRnS Phase jitter: NS-SAS <1.3ps rms using Clk Jit Tool 1.6.4 4 - NS SAS/SRC outputs 4 - CPU outputs 3 - SRC outputs 1 - HCSL DOT96 output 1 - 3.3V 48M output 5 - 3.3V PCI outputs 1 - 3.3V 14.318M output Block Diagram CPU(3:0) X1 25 SRC(2:0) X2 PCI(4:0) /3 Low Drift non-SS PLL <500ps LTJ NS SAS(1:0) DOT96 Non-SS PLL 14.31818MHz REF14M Non-SS PLL Test Sel Test Mode Logic CKPWRGD /PD SMBDAT SMBCLK IREF IDT CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING 1 932SQ426 REV C 022916932SQ426 CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING Pin Configuration (TSSOP) SMBCLK 1 64 SMBDAT GND14 2 63 VDDCPU AVDD14 3 62 CPU3T VDD14 4 61 CPU3C v REF14 3x/TEST SEL 5 60 CPU2T GND14 6 59 CPU2C GNDXTAL 7 58 GNDCPU X1 25 8 57 VDDCPU X2 25 9 56 CPU1T VDDXTAL10 55CPU1C GNDPCI 11 54 CPU0T VDDPCI 12 53 CPU0C PCI4 2x 13 52 GNDNS PCI3 2x 14 51 AVDD NS SAS PCI2 2x 15 50 NS SAS1T PCI1 2x 16 49 NS SAS1C PCI0 2x 17 48 NS SAS0T GNDPCI 18 47 NS SAS0C VDDPCI 19 46 GNDNS VDD4820 45VDDNS 48M 2x 21 44 NS SRC1T GND4822 43NS SRC1C GND9623 42NS SRC0T DOT96T 24 41 NS SRC0C DOT96C 25 40 IREF AVDD96 26 39 GNDSRC TEST MODE 27 38 AVDD SRC CKPWRGD /PD 28 37 VDDSRC VDDSRC 29 36 SRC2T SRC0T 30 35 SRC2C SRC0C 31 34 SRC1T GNDSRC 32 33 SRC1C 64-TSSOP Note: Pins with prefix have internal 120K pullup Pins with v prefix have internal 120K pulldown 932SQ426 Functionality CPU, SRC, NS SAS, NS SRC PCI REF DOT96 USB 100 33.33 14.318 96.00 48.00 MHz Power Group Pin Numbers 932SQ426 Power Down Functionality QFN TSSOP Single Single- Description Differential ended CKPWRGD /PD ended VDD GND VDD GND Outputs Outputs Outputs 57 56 3 2 14MHz PLL Analog w/Latch 58 60 4 6 REF14M Output and Logic 1 2 1HI-Z Low Low 64 61 10 7 25MHz XTAL 0 Running 2,9 1,8 12, 19 11,18 PCI Outputs and Logic 1. Hi-Z on the differential outputs will result in both True 10 12 20 22 48MHz Output and Logic and Complement being low due to the termination 16 13 26 23 96MHz PLL Analog, Output and Logic 19,27,28 22 29,37,38 32,39 SRC Outputs and Logic 2. These outputs are Hi-Z after VDD is applied and before 35 36 45 46 Non-Spreading Differential Outputs & Logic the first assertion of CKPWRGD . 41 42 51 52 NS-SAS/SRC PLL Analog 47,53 48 57,63 58 CPU Outputs and Logic IDT CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING 2 932SQ426 REV C 022916 932SQ426