Short-Form Datasheet HXT14100 56Gbps Single Channel PAM4 VCSEL Driver The HXT14100 is a single channel, low power, Features Linear PAM4 VCSEL driver for SR optical 230mW per channel Power Dissipation typical applications that supports signaling rates up to Supports up to: I = 12mAPP and I = 12mA MOD BIAS 29GBuad PAM4. In conjunction with a VCSEL laser, with V = 3.3V CC the device handles the complete electrical-to-optical Integrated 12-bit ADC with 6 channel analog conversion. It includes CML input with equalization, multiplexor front-end linear multi-stage drivers, plus a digital interface to a driver control and supervision. Programmable 8-bit Laser Modulation and Bias current control The HXT14100 integrates a number of functions like Integrated Bias Monitor, Transmit and Receive Automatic Power Control (APC), internal and module Power monitor capability temperature monitoring and reporting. With RSSI input, the driver can directly synchronize with the Automatic Power Control (APC) input from a receiver. Programmable Input LOS and Squelch function with disable, Transmit Disable, and Transmit Fault HXT14100 is a direct DC-coupled die designed for a indication chip-on-board (COB) transmitter and in TOSA applications. It offers a cost-effective and compact Programmable Input CTLE Equalization solution. Integrated Temperature Sensor and input for external module temperature sensor Applications Interrupts with User selectable Mask control SFP56 Ethernet SR modules Input Polarity Inversion 50G Ethernet SR AOC Laser Disable for I and I MOD BIAS 64G Fiber Channel modules Integrated OTP for calibration Infiniband EDR modules 2-wire interface control Ordering Information Part Temp. Range Dimensions 1 HXT14100-DNU Bare Die: -5C to +95C 2 1350 x 1120m HXT14100-TNU HXT14100-EVB Room Temp. Evaluation Board 1. Carrier type is waffle pack. 2. Carrier type is blue tape. R08DO0001EU0100 Rev.1.1 Page 1 Apr.14.21 2021 Renesas Electronics HXT14100 Short-Form Datasheet I / I Control BIAS MOD DFT BIST EN I I BIAS MO D OSC 8bits 8bits VCC LAO TX P1 Linear DFT DML Output Input Buffer Buffer / Pre - Driver MUX Stage Gain Adjust TX N1 GNDO VEE Loss of EQ 4bits POL INV GAIN 8bits EF I 2bits Fault Detect Signal TX LOS V FAIL Sense EQ / Polarity Control Gain / Eye Shaping Control Detect I BIAS LOS A 4bits BIAS MON MPD MON MPD IN LOS D 4bits I MPD PWR MON APC Control RESET Registers / ADC VCC ADC Digital MUX TSNS T SENSE INT SDA 12bit Diagnostics 2 T SENSE EXT TRTN I C Slave Registers SCL RSSI Interface RSSI I-V Convertor OSC TX DIS LASER SAFETY and OTP CONTROL LOGIC 2 TX FAULT 128 bits I C ADDR b1:b0 RSSI INT Figure 1. Block Diagram R08DO0001EU0100 Rev.1.1 Page 2 Apr.14.21 CTLE