FEDL610Q101-01
Issue Date: Jan. 23, 2013
ML610Q101/ML610Q102
8-bit Microcontroller
GENERAL DESCRIPTION
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as timers, PWM, UART,
voltage level supervisor (VLS) function, and 10-bit successive approximation type A/D converter, are incorporated around 8-bit
CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by pipe line architecture parallel
processing.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
CPU
8-bit RISC CPU (CPU name: nX-U8/100)
Instruction system: 16-bit instructions
Instruction set:
Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic
operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on
On-Chip debug function
Minimum instruction execution time
30.5s (@32.768kHz system clock)
0.122s (@8.192MHz system clock)
Internal memory
ML610Q101 : Internal 4Kbyte Flash ROM (2K16 bits) (including unusable 32 byte test data area)
ML610Q102 : Internal 6Kbyte Flash ROM (3K16 bits) (including unusable 32 byte test data area)
Internal 256byte data RAM (2568 bits)
Interrupt controller
1 non-maskable interrupt source (Internal source: 1)
21 maskable interrupt sources (Internal sources: 16, External sources: 5)
Time base counter (TBC)
Low-speed time base counter 1 channel
High-speed time base counter 1 channel
Watchdog timer (WDT)
Non-maskable interrupt and reset
Free running
Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
Timer
8 bits 6 channels (16-bit configuration available)
Support Continuos timer mode/one shot timer mode
Timer start/stop function by software or external trigger input
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ML610Q101/ML610Q102
PWM
Resolution 16 bits 1 channel
Support Continuos timer mode/one shot timer mode
PWM start/stop function by software or external trigger input
UART
Half-duplex
TXD/RXD 1 channels
Bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits
Positive logic/negative logic selectable
Built-in baud rate generator
Successive approximation type A/D converter (SA-ADC)
10-bit A/D converter
Input 6 channels
Analog Comparator
Operating voltage: V = 2.7V to 5.5V
DD
Input voltage by common mode: V = 0.1V to V - 1.5V
DD DD
Hysteresis (Comparator0 only): 20mV(Typ.)
Allows selection of interrupt disabled mode,falling-edge interrupt mode,rising-edge interrupt mode,
or both-edge interrupt mode.
General-purpose ports (GPIO)
Input/output port 11 channels (including secondary functions)
Reset
Reset by the RESET_N pin
Reset by power-on detection
Reset by the watchdog timer (WDT) overflow
Reset by voltage level supervisor(VLS)
Voltage level supervisor(VLS)
Judgment accuracy: 3.0% (Typ.)
It can be used for low level detection reset.
Clock
Low-speed clock:
Built-in RC oscillation (32.768 kHz)
High-speed clock:
Built-in PLL oscillation (16.384 MHz), external clock
The clock of the CPU is 8.192MHz(Max)
Selection of high-speed clock mode by software:
Built-in PLL oscillation, external clock
Power management
HALT mode: Instruction execution by CPU is suspended (peripheral circuits are in operating states).
STOP mode: Stop of low-speed oscillation and high-speed oscillation (Operations of CPU and peripheral circuits are
stopped.)
Clock gear: The frequency of high-speed system clock can be changed by software (1/1, 1/2, 1/4, or 1/8 of the oscillation
clock)
Block Control Function: Power down (reset registers and stop clock supply) the circuits of unused peripherals.
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