EVALSTISO62XV1 STMicroelectronics

EVALSTISO62XV1 Data brief Dual channel digital isolator evaluation board Features Dual channel digital isolator Supply voltage up to 5 V SO8 and SO8 wide package (1) 6k V galvanic isolation technology 1. Details about isolation parameters are available in the specific part numbers datasheet Description The EVALSTISO62XV1 allows a complete evaluation of the dual channel digital isolators of the STISO family. Based on STs thick oxide galvanic isolation technology, the STISO digital isolators feature high speed communication and reduced high speed distortion. Product status link EVALSTISO62XV1 DB4342 - Rev 1 - November 2020 www.st.com For further information contact your local STMicroelectronics sales office.Isolation EVALSTISO62XV1 Schematic diagram and bill of materials 1 Schematic diagram and bill of materials Figure 1. Schematic diagram VDD1 VDD2 J1 J4 C1 J2 J3 C2 2 2 10uF 10uF 1 1 GND1 VDD1 VDD2 CN1 CN2 R1 R2 SMA conn. SMA conn. NM NM 1 1 S S TP1 TP2 TP3 TP4 R3 R4 C3 C4 R5 R6 J5 J6 NM NM 50R 15pF 15pF 50R C5 VDD1 VDD2 C6 GND1 GND2 U1 GND1 GND1 GND2 GND2 100nF 100nF GND1 1 8 GND2 VDD1 VDD2 2 7 A1 A2 3 6 B1 B2 4 5 GND1 GND2 STISOxxx SO8N U2 1 8 VDD1 VDD2 2 7 A1 A2 3 6 B1 B2 4 5 VDD1 VDD2 GND1 GND2 STISOxxx SO8W CN3 CN4 R7 R8 SMA conn. SMA conn. GND1 GND2 NM NM 1 1 S S R9 R10 C7 C8 R11 R12 J7 J8 50R NM 15pF 15pF NM 50R GND1 GND2 GND1 GND1 GND2 GND2 FMT1 FMT2 FMT3 FID40RD 80RD FID40RD 80RD FID40RD 80RD DB4342 - Rev 1 page 2/6 5 5 G4 4 G4 G3 4 3 G3 3 G2 2 G2 2 G1 G1 2 1 2 1 2 1 Isolation 2 1 2 1 2 1 2 2 G1 3 G1 3 G2 4 G2 4 G3 G3 5 5 G4 G4