L9848TR STMicroelectronics

L9848 Octal configurable low/high side driver Features Configurable up to 6 high side drivers R = max.1.5 T = 25 C DSON j Current limit of each output at min. 0.8 A Supply voltage 4.75 V to 5.25 V Output voltage clamping min. 35 V (low side mode) Output voltage clamping -30 V (high side mode) SO-28 SPI interface for data communication Additional PWM inputs for 2 outputs Thermal shutdown for all outputs Open load detection in off mode Reverse battery protection for outputs (amb) In addition, 2 outputs are capable of being Ground disconnection for high side configured PWMed via an external pin (outputs 5-6). The outputs integrated standard serial peripheral interface (SPI) controls all outputs and provides diagnostic information. Description Integrated clamping circuits, waveshaping, The L9848 IC is a highly flexible monolithic protection against positive and negative voltage medium current output driver that incorporates 2 transients and thermal shutdown for all outputs dedicated low side outputs (outputs 7-8) and 6 open a wide range of automotive and industrial outputs that can be used as either internal low or applications high side drives in any combination (outputs 1-6). Table 1. Device summary Order code Package Packing L9848 SO-28 Tube September 2013 Rev 6 1/27 www.st.com 1Contents L9848 Contents 1 Block diagram and pin description . 6 2 Electrical specifications 8 2.1 Absolute maximum ratings . 8 2.2 Operation conditions . 8 2.3 Thermal data . 9 2.4 Electrical characteristcs . 9 2.4.1 DC characteristics 9 2.4.2 AC characteristics . 11 3 Functional description 14 3.1 General features 14 3.2 Outputs - Common characteristics . 14 3.2.1 Output 1-4 . 14 3.2.2 Output 5-6 . 15 3.2.3 Output7-8 15 3.3 Main power input (VDD) 15 3.4 Discrete inputs (IN5-6) . 15 3.5 Serial peripheral interface (SPI) 15 3.5.1 Serial data output (DO) . 16 3.5.2 Serial data input (DI) . 16 3.5.3 Chip select (CS) . 16 3.5.4 Serial clock (SCLK) 16 3.6 SPI DI input command register 17 3.7 Fault operation . 17 3.7.1 Initial fault register SPI Cycle . 18 3.7.2 Incandescent lamp outputs 18 3.8 Configuration for Output1-6 . 18 3.8.1 Low side drivers . 18 3.8.2 High side drivers 18 3.9 DRN1-6 susceptibility to negative voltage transients 18 3.10 Thermal shutdown 19 3.11 Charge pump usage . 19 2/27