LD57100J105R STMicroelectronics

LD57100 Datasheet 1 A ultra low-dropout LDO with bias Features Input voltage from V to 5.5 V OUT Input bias supply pin from 3.0 V to 5.5 V Ultra low-dropout voltage (40 mV typ. at 1 A load) Low ground current (35 A typ. at no load) Output voltage tolerance: 1% all over temperature range, 0.5% at 25 C 1 A guaranteed output current 50 mV output voltage step available from 0.4 V to 1.8 V 100 mV output voltage step available from 1.9 V to 3.6 V Adjustable version from 0.5 V to 3.0 V Logic-controlled electronic shutdown Internal current limit Thermal shutdown Output active discharge function Available in Flip Chip6 (0.8x1.2 mm) package Temperature range: -40 C to 85 C Applications Smartphones Product status link Cameras LD57100 Low voltage, low noise post regulation Description The LD57100 is a high accuracy voltage regulator, which provides 1 A of current. It is equipped with an NMOS pass transistor, whose gate is biased by a dedicated pin, thus allowing the ultra-low drop performance even at very low input voltages. It is available in Flip Chip6 (0.8x1.2 mm), maximizing the space saving. This device is stabilized with a small ceramic capacitor on the output. The ultra low drop, low quiescent current and short-circuit protection make the LD57100 suitable for low power battery-operated applications. An enable logic control function puts the LD57100 in shutdown mode allowing a total current consumption lower than 0.1 A. Thermal protection is also included. DS13123 - Rev 5 - April 2021 www.st.com For further information contact your local STMicroelectronics sales office.LD57100 Diagrams 1 Diagrams Figure 1. Block diagram fixed version VBIAS VIN Thermal protection Vref EN VOUT Current limiter SNS EN GND Figure 2. Block diagram adjustable version VBIAS VIN Thermal protection Vref EN VOUT Current limiter FB EN GND DS13123 - Rev 5 page 2/21