M24C02-FMN6TP STMicroelectronics

M24C01/02-W M24C01/02-R M24C02-F 1-Kbit and 2-Kbit serial IC bus EEPROMs Datasheet - production data Features 2 Compatible with I C bus modes: 400 kHz 100 kHz Memory array: TSSOP8 (DW) 169 mil width 1 Kbit (128 bytes) of EEPROM 2 Kbit (256 bytes) of EEPROM Page size: 16 byte Single supply voltage: M24C01/02-W: 2.5 V to 5.5 V SO8 (MN) M24C01/02-R: 1.8 V to 5.5 V 150 mil width M24C02-F: 1.7 V to 5.5 V (full temperature range) and 1.6 V to 1.7 V (limited temperature range) Write: Byte Write within 5 ms (1) Page Write within 5 ms PDIP8 (BN) Operating temperature range: from -40 C up to +85 C Random and sequential Read modes Write protect of the whole memory array Enhanced ESD/Latch-Up protection UFDFPN8 (MC) DFN8 - 2 x 3 mm More than 4 million Write cycles More than 200-years data retention Packages RoHS compliant and halogen-free (ECOPACK2 ) UFDFPN5 (MH) DFN5 - 1.7 x 1.4 mm 1. Not recommended for new designs October 2017 DocID024020 Rev 6 1/42 This is information on a product in full production. www.st.comContents M24C01/02-W M24C01/02-R M24C02-F Contents 1 Description . 6 2 Signal description . 8 2.1 Serial Clock (SCL) . 8 2.2 Serial Data (SDA) 8 2.3 Chip Enable (E2, E1, E0) 8 2.4 Write Control (WC) . 8 2.5 V (ground) . 8 SS 2.6 Supply voltage (V ) . 8 CC 2.6.1 Operating supply voltage (V ) 8 CC 2.6.2 Power-up conditions 9 2.6.3 Device reset . 9 2.6.4 Power-down conditions 9 3 Memory organization . 10 4 Device operation . 11 4.1 Start condition 12 4.2 Stop condition 12 4.3 Data input . 12 4.4 Acknowledge bit (ACK) 12 4.5 Device addressing 13 5 Instructions . 14 5.1 Write operations 14 5.1.1 Byte Write . 15 5.1.2 Page Write . 16 5.1.3 Minimizing Write delays by polling on ACK 17 5.2 Read operations 18 5.2.1 Random Address Read . 19 5.2.2 Current Address Read 19 5.2.3 Sequential Read 19 2/42 DocID024020 Rev 6