M95M02-DRMN6TP STMicroelectronics

M95M02-DR M95M02-DF 2-Mbit serial SPI bus EEPROM Datasheet - production data Features Compatible with the serial peripheral interface (SPI) bus Memory array 2 Mbit (256 Kbytes) of EEPROM SO8N (MN) 150 mil width Page size: 256 bytes Write Byte Write within 10 ms Page Write within 10 ms WLCSP (CS) Additional write lockable page (Identification page) WLCSP (3.556x2.011 mm) Write protect: quarter, half or whole memory array Clock frequency: 5 MHz Single supply voltage: 1.7 to 5.5 V over -20 C to +85 C 1.8 to 5.5 V over -40 C to +85 C Operating temperature range: from -40 C up to +85 C Enhanced ESD protection More than 4 million Write cycles More than 200-year data retention Packages: SO8 (ECOPACK2) WLCSP (ECOPACK2) August 2019 DS7024 Rev 12 1/47 This is information on a product in full production. www.st.comContents M95M02-DR M95M02-DF Contents 1 Description . 6 2 Memory organization 8 3 Signal description . 9 3.1 Serial data output (Q) . 9 3.2 Serial data input (D) 9 3.3 Serial clock (C) 9 3.4 Chip select (S) 9 3.5 Hold (HOLD) 9 3.6 Write protect (W) . 10 3.7 V supply voltage 10 CC 3.8 V ground 10 SS 4 Connecting to the SPI bus . 11 4.1 SPI modes 12 5 Operating features . 13 5.1 Supply voltage (V ) 13 CC 5.1.1 Operating supply voltage (V ) . 13 CC 5.1.2 Device reset 13 5.1.3 Power-up conditions . 13 5.1.4 Power-down 14 5.2 Active power and Standby power modes . 14 5.3 Hold condition 14 5.4 Status register . 15 5.5 Data protection and protocol control 15 6 Instructions . 16 6.1 Write enable (WREN) 17 6.2 Write disable (WRDI) 18 6.3 Read Status register (RDSR) 19 6.3.1 WIP bit 19 2/47 DS7024 Rev 12