ST7FLIT15BY1M6

ST7LITE1xB 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI Memories up to 4 Kbytes single voltage extended Flash (XFlash) Program memory with read-out pro- tection, In-Circuit Programming and In-Appli- SO20 cation programming (ICP and IAP). 10K write/ DIP20 erase cycles guaranteed, data retention: 20 years at 55C. 256 bytes RAM QFN20 128 bytes data EEPROM with read-out pro- SO16 tection. 300K write/erase cycles guaranteed, DIP16 300 data retention: 20 years at 55C. outputs, 1 input capture, 4 output compare Clock, Reset and Supply Management and one pulse functions Enhanced reset system Communication Interface Enhanced low voltage supervisor (LVD) for SPI synchronous serial interface main supply and an auxiliary voltage detector Interrupt Management (AVD) with interrupt capability for implement- ing safe power-down procedures 12 interrupt vectors plus TRAP and RESET Clock sources: Internal 1% RC oscillator (on 15 external interrupt lines (on 4 vectors) ST7FLITE15B and ST7FLITE19B), crystal/ Analog Comparator ceramic resonator or external clock A/D Converter Internal 32-MHz input clock for Auto-reload 7 input channels timer Fixed gain Op-amp Optional x4 or x8 PLL for 4 or 8 MHz internal 13-bit precision for 0 to 430 mV ( 5V V ) clock DD 10-bit precision for 430 mV to 5V ( 5V V ) Five Power Saving Modes: Halt, Active-Halt, DD Auto Wake-up from Halt, Wait and Slow Instruction Set I/O Ports 8-bit data manipulation Up to 17 multifunctional bidirectional I/O lines 63 basic instructions with illegal opcode de- tection 7 high sink outputs 17 main addressing modes 5 Timers 8 x 8 unsigned multiply instructions Configurable watchdog timer Development Tools Two 8-bit Lite Timers with prescaler, 1 realtime base and 1 input capture Full hardware/software development package Two 12-bit Auto-reload Timers with 4 PWM DM (Debug Module) Device Summary Features ST7LITE10B ST7LITE15B ST7LITE19B Program memory - bytes 2K/4K RAM (stack) - bytes 256 (128) Data EEPROM - bytes - - 128 Lite Timer with Wdg, Autoreload Lite Timer with Wdg, Autoreload Timer with 32-MHz input clock, SPI, Peripherals Timer, SPI, 10-bit ADC with Op-Amp 10-bit ADC with Op-Amp, Analog Comparator Operating Supply 2.7V to 5.5V CPU Frequency Up to 8Mhz(w/ ext OSC at 16MHz) Up to 8Mhz (w/ ext OSC at 16MHz or int 1MHz RC 1%, PLLx8/4MHz) Operating Temperature -40C to +85C / -40C to +125C Packages SO20 300, DIP20, SO16 300, DIP16 SO20 300, DIP20, SO16 300, DIP16, QFN20 Rev 6 June 2008 1/159 1Table of Contents 1 INTRODUCTION 4 2 PIN DESCRIPTION 5 3 REGISTER & MEMORY MAP 9 4 FLASH PROGRAM MEMORY 12 4.1 INTRODUCTION . 12 4.2 MAIN FEATURES 12 4.3 PROGRAMMING MODES 12 4.4 ICC INTERFACE . 13 4.5 MEMORY PROTECTION 14 4.6 RELATED DOCUMENTATION 14 4.7 REGISTER DESCRIPTION . 14 5 DATA EEPROM . 15 5.1 INTRODUCTION . 15 5.2 MAIN FEATURES 15 5.3 MEMORY ACCESS . 16 5.4 POWER SAVING MODES . 18 5.5 ACCESS ERROR HANDLING 18 5.6 DATA EEPROM READ-OUT PROTECTION . 18 5.7 REGISTER DESCRIPTION . 19 6 CENTRAL PROCESSING UNIT . 20 6.1 INTRODUCTION . 20 6.2 MAIN FEATURES 20 6.3 CPU REGISTERS 20 7 SUPPLY, RESET AND CLOCK MANAGEMENT 23 7.1 INTERNAL RC OSCILLATOR ADJUSTMENT 23 7.2 PHASE LOCKED LOOP . 23 7.3 REGISTER DESCRIPTION . 25 7.4 MULTI-OSCILLATOR (MO) . 27 7.5 RESET SEQUENCE MANAGER (RSM) . 28 7.6 SYSTEM INTEGRITY MANAGEMENT (SI) 31 8 INTERRUPTS . 36 8.1 NON MASKABLE SOFTWARE INTERRUPT . 36 8.2 EXTERNAL INTERRUPTS . 36 8.3 PERIPHERAL INTERRUPTS . 36 9 POWER SAVING MODES . 40 9.1 INTRODUCTION . 40 9.2 SLOW MODE . 40 9.3 WAIT MODE 41 9.4 HALT MODE 42 9.5 ACTIVE-HALT MODE . 43 9.6 AUTO WAKE UP FROM HALT MODE 44 10 I/O PORTS . 48 10.1 INTRODUCTION . 48 159 10.2 FUNCTIONAL DESCRIPTION 48 10.3 I/O PORT IMPLEMENTATION 52 2/159 1