SiB417AEDK Vishay Siliconix P-Channel 1.2 V (G-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET g V (V) R () Max. Q (Typ.) DS DS(on) I (A) g Thermally Enhanced PowerPAK D a 0.032 at V = - 4.5 V SC-75 Package GS - 9 a 0.045 at V = - 2.5 V - Small Footprint Area GS - 9 - Low On-Resistance a - 8 0.063 at V = - 1.8 V 11.3 nC GS - 9 100 % R Tested 0.120 at V = - 1.5 V - 8.8 g GS Typical ESD Protection 2500 V 0.230 at V = - 1.2 V - 6.4 GS Material categorization: For definitions of compliance PowerPAK SC-75-6L-Single please see www.vishay.com/doc 99912 1 APPLICATIONS D 2 S Load Switch for Portable Devices, D Smart Phones, and Tablet PCs 3 G - Low Voltage Drop D 6 - Space Savings D S 5 Marking Code 1.60 mm S G 1.60 mm 4 B N X Part code X X X D Ordering Information: Lot Traceability SiB417AEDK-T1-GE3 (Lead (Pb)-free and Halogen-free) and Date code P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V - 8 Drain-Source Voltage DS V V 5 Gate-Source Voltage GS a T = 25 C - 9 C a T = 70 C - 9 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C - 7.2 A b, c T = 70 C A - 5.7 A I - 15 Pulsed Drain Current (t = 300 s) DM a T = 25 C - 9 C I Continuous Source-Drain Diode Current S b, c T = 25 C - 2 A 13 T = 25 C C 8.4 T = 70 C C P Maximum Power Dissipation W D b, c T = 25 C 2.4 A b, c T = 70 C 1.6 A T , T - 55 to 150 Operating Junction and Storage Temperature Range J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f R t 5 s 41 51 thJA Maximum Junction-to-Ambient C/W R Maximum Junction-to-Case (Drain) Steady State 7.5 9.5 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SC-75 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 105 C/W. g. Based on T = 25 C. C Document Number: 63899 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-2333-Rev. A, 01-Oct-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiB417AEDK Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = 0 V, I = - 250 A Drain-Source Breakdown Voltage - 8 V DS GS D V Temperature Coefficient V /T - 6.1 DS DS J I = - 250 A mV/C D V Temperature Coefficient V /T 2.1 GS(th) GS(th) J Gate-Source Threshold Voltage V V = V , I = - 250 A - 0.35 - 1 V GS(th) DS GS D I V = 0 V, V = 5 V Gate-Source Leakage 20 GSS DS GS V = - 8 V, V = 0 V - 1 A DS GS Zero Gate Voltage Drain Current I DSS V = - 8 V, V = 0 V, T = 55 C - 10 DS GS J a I V - 5 V, V = - 4.5 V - 15 A On-State Drain Current D(on) DS GS V = - 4.5 V, I = - 3 A 0.0265 0.0320 GS D V = - 2.5 V, I = - 3 A 0.0360 0.0450 GS D a R V = - 1.8 V, I = - 1 A 0.0500 0.0630 Drain-Source On-State Resistance DS(on) GS D V = - 1.5 V, I = - 0.5 A 0.0600 0.1200 GS D V = - 1.2 V, I = - 0.5 A 0.1000 0.2300 GS D a g V = - 4 V, I = - 7.4 A 18 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 878 iss Output Capacitance C V = - 4 V, V = 0 V, f = 1 MHz 415 pF oss DS GS C Reverse Transfer Capacitance 735 rss V = - 4 V, V = - 5 V, I = - 7.4 A 12.3 18.5 DS GS D Q Total Gate Charge g 11.3 17 nC Gate-Source Charge Q V = - 4 V, V = - 4.5 V, I = - 7.4 A 1.35 gs DS GS D Q Gate-Drain Charge 3.42 gd Gate Resistance R f = 1 MHz 1.3 6.5 13 g t Turn-On Delay Time 19 29 d(on) Rise Time t 18 27 V = - 4 V, R = 0.68 r DD L ns I - 5.9 A, V = - 4.5 V, R = 1 t Turn-Off Delay Time D GEN g 32 48 d(off) t Fall Time 19 29 f Drain-Source Body Diode Characteristics I Continuous Source-Drain Diode Current T = 25 C - 9 S C A I Pulse Diode Forward Current - 15 SM V I = - 5.9 A, V = 0 V Body Diode Voltage - 0.8 - 1.2 V SD S GS Body Diode Reverse Recovery Time t 32 48 ns rr Q Body Diode Reverse Recovery Charge 13 20 nC rr I = - 5.9 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 14 a ns t Reverse Recovery Rise Time 18 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 63899 For technical questions, contact: pmostechsupport vishay.com 2 S12-2333-Rev. A, 01-Oct-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000