SIZ916DT-T1-GE3 Vishay

6 mm6 mm SiZ916DT www.vishay.com Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFETs FEATURES PRODUCT SUMMARY TrenchFET Gen IV power MOSFETs g V (V) R () (MAX.) I (A) Q (TYP.) DS DS(on) D g 100 % R and UIS tested a g 0.00640 at V = 10 V 16 GS Channel-1 30 7.2 nC a Material categorization: 0.01000 at V = 4.5 V 16 GS for definitions of compliance please see a 0.00130 at V = 10 V 40 GS Channel-2 30 45 nC www.vishay.com/doc 99912 a 0.00175 at V = 4.5 V 40 GS APPLICATIONS PowerPAIR 6 x 5 G D 1 2 S 2 8 CPU core power S 2 7 S 2 6 Computer/server peripherals 5 S /D 1 2 G 1 (Pin 9) Synchronous buck converter N-Channel 1 D 1 MOSFET 1 POL S /D 1 2 2 G 1 3 D Telecom DC/DC 1 4 11 D 1 D G 2 1 Top View Bottom View N-Channel 2 Ordering Information: MOSFET S 2 SiZ916DT-T1-GE3 (lead (Pb)-free and halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL CHANNEL-1CHANNEL-2UNIT Drain-Source Voltage V 30 DS V Gate-Source Voltage V +20, -16 GS a a T = 25 C 16 40 C a a T = 70 C 16 40 C = 150 C) Continuous Drain Current (T I J D a, b, c a, b, c T = 25 C 16 40 A b, c b, c T = 70 C 15.5 38.8 A A Pulsed Drain Current (t = 300 s) I 80 100 DM T = 25 C 19 28 C Continuous Source Drain Diode Current I S b, c b, c T = 25 C 3.25 4.3 A Single Pulse Avalanche Current I 10 15 AS L = 0.1 mH Single Pulse Avalanche Energy E 5 11.25 mJ AS T = 25 C 22.7 100 C T = 70 C 14.5 64 C Maximum Power Dissipation P W D b, c b, c T = 25 C 3.9 5.2 A b, c b, c T = 70 C 2.5 3.3 A Operating Junction and Storage Temperature Range T , T -55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS CHANNEL-1 CHANNEL-2 PARAMETER SYMBOL UNIT TYP. MAX. TYP. MAX. b, f Maximum Junction-to-Ambient t 10 s R 25 32 19 24 thJA C/W Maximum Junction-to-Case (Drain) Steady State R 4.4 5.5 1 1.25 thJC Notes a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 62 C/W for channel-1 and 55 C/W for channel-2. g. T = 25 C. C S15-1672-Rev. B, 20-Jul-15 Document Number: 62721 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 5 mmSiZ916DT www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN. TYP.MAX.UNIT Static V = 0 V, I = 250 A Ch-1 30 - - GS D Drain-Source Breakdown Voltage V V DS V = 0 V, I = 250 A Ch-2 30 - - GS D I = 250 A Ch-1 - 17 - D V Temperature Coefficient V /T DS DS J I = 250 A Ch-2 - 8.8 - D mV/C I = 250 A Ch-1 - -5 - D V Temperature Coefficient V /T GS(th) GS(th) J I = 250 A Ch-2 - -5.9 - D V = V , I = 250 A Ch-1 1.2 - 2.4 DS GS D Gate Threshold Voltage V V GS(th) V = V , I = 250 A Ch-2 1 - 2.4 DS GS D Ch-1 - - 100 Gate Source Leakage I V = 0 V, V = +20 V, -14 V nA GSS DS GS Ch-2 - - 100 V = 30 V, V = 0 V Ch-1 - - 1 DS GS V = 30 V, V = 0 V Ch-2 - - 1 DS GS Zero Gate Voltage Drain Current I A DSS V = 30 V, V = 0 V, T = 55 C Ch-1 - - 5 DS GS J V = 30 V, V = 0 V, T = 55 C Ch-2 - - 5 DS GS J V 5 V, V = 10 V Ch-1 20 - - DS GS a On-State Drain Current I A D(on) V 5 V, V = 10 V Ch-2 25 - - DS GS V = 10 V, I = 19 A Ch-1 - 0.00530 0.00640 GS D V = 10 V, I = 20 A Ch-2 - 0.00105 0.00130 GS D a Drain-Source On-State Resistance R DS(on) V = 4.5 V, I = 15 A Ch-1 - 0.00800 0.01000 GS D V = 4.5 V, I = 20 A Ch-2 - 0.00140 0.00175 GS D V = 10 V, I = 19 A Ch-1 - 55 - DS D a Forward Transconductance g S fs V = 10 V, I = 20 A Ch-2 - 116 - DS D b Dynamic Ch-1 - 1208 - Input Capacitance C iss Ch-2 - 8082 - Ch-1 - 375 - Channel-1 Output Capacitance C pF oss V = 15 V, V = 0 V, f = 1 MHz DS GS Ch-2 - 1961 - Ch-1 - 30 - Channel-2 Reverse Transfer Capacitance C rss V = 15 V, V = 0 V, f = 1 MHz Ch-2 - 227 - DS GS Ch-1 - 0.025 0.050 - C /C Ratio r i Ch-2 - 0.028 0.056 - V = 15 V, V = 10 V, I = 20 A Ch-1 - 17 26 DS GS D V = 15 V, V = 10 V, I = 20 A Ch-2 - 106 160 DS GS D Total Gate Charge Q g Ch-1 - 7.2 11 Ch-2 - 45 68 Channel-1 V = 15 V, V = 4.5 V, I = 20 A DS GS D Ch-1 - 3.6 - Gate-Source Charge Q nC gs Ch-2 - 23.2 - Channel-2 V = 15 V, V = 4.5 V, I = 20 A Ch-1 - 0.94 - DS GS D Gate-Drain Charge Q gd Ch-2 - 5 - Ch-1 - 10 - Output Charge Q V = 15 V, V = 0 V oss DS GS Ch-2 - 57.5 - Ch-1 0.5 2.5 5 Gate Resistance R f = 1 MHz g Ch-2 0.2 1 2 S15-1672-Rev. B, 20-Jul-15 Document Number: 62721 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000