e TM ADVANCED EPAD LINEAR DEVICES, INC. ALD111933 DUAL N-CHANNEL ENHANCEMENT MODE EPAD V = +3.30V GS(th) MATCHED PAIR MOSFET ARRAY GENERAL DESCRIPTION APPLICATIONS The ALD111933 is a high precision monolithic dual N-Channel En- Precision current mirrors Precision current sources hancement Mode Matched Pair MOSFET Array matched at the factory using ALDs proven EPAD CMOS technology. This de- Voltage choppers vice is intended for precision nano-watt, low voltage, small signal Differential amplifier input stages applications. ALD111933 features a pecision matched +3.30V Discrete voltage comparators threshold voltage for each of the dual MOSFET devices as well as Voltage bias circuits a max. offset voltage of 20mV. These two key features enable Sample and Hold circuits extremely low power (nW) precision comparator circuit functions Analog inverters with the threshold voltage itself being used as a zero (near-zero Level shifters drain current) power coarse voltage reference. Source followers and buffers Current multipliers ALD111933 MOSFETs are designed and built with exceptional de- Discrete analog multiplexers/matrices vice electrical characteristics matching. Since these devices are Discrete analog switches on the same monolithic chip, they also exhibit excellent tempco Low current voltage clamps tracking characteristics. Each device is versatile as a circuit ele- Voltage detectors ment and is a useful design component for a broad range of preci- Capacitive probes sion analog applications. They are basic building blocks for cur- Sensor interfaces rent mirrors, current sources, differential amplifier input stages, Peak detectors transmission gates, and multiplexer applications. For most appli- Level shifters cations, connect V- and IC pins to the most negative voltage po- Multiple preset voltage hysteresis circuits tential in the system on the printed circuit board. All other pins (with other V EPAD MOSFETS) GS(th) must have voltages within V+ and V- voltage limits. Energy harvesting circuits Zero standby power voltage monitors ALD111933 devices are built for minimum offset voltage and dif- ferential thermal response, and they are designed for switching and amplifying applications in +3.0V to +10V systems where low input bias current, low input capacitance and fast switching speed are desired. Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. The high input impedance and the high DC current gain of the Field Effect Transistor result in extremely low current loss through the Gate Input, enabling control with very low input power and circuit functions operating with nano-power. PIN CONFIGURATION FEATURES Enhancement-mode (normally off) ALD111933 Precision Gate Threshold Voltage: +3.30V Matched MOSFET to MOSFET characteristics - V Tight lot to lot parametric control Parallel connection of MOSFETs to increase drain currents 8 IC* 1 G N2 Low input capacitance V match (Offset Voltage) to 20mV GS(th) G 2 7 D N1 N2 12 High input impedance 10 typical Positive, zero, and negative V temperature coefficient GS(th) - - D 3 V 6 V N1 8 DC current gain >10 Low input and output leakage currents S 4 5 S N1 N2 ORDERING INFORMATION (L suffix denotes lead-free (RoHS)) Operating Temperature Range * SAL, PAL PACKAGES 0C to +70C 8-Pin SOIC Package 8-Pin Plastic Dip Package *IC pins are internally connected, connect to V- ALD111933SAL ALD111933PAL *Contact factory for industrial temp. range or user-specified threshold voltage values. 2015 Advanced Linear Devices, Inc., Vers. 2.0 www.aldinc.com 1 of 10 E N A D E L BABSOLUTE MAXIMUM RATINGS Drain-Source voltage, V 10.6V DS Gate-Source voltage, V 10.6V GS Operating Current 80mA Power dissipation 500mW Operating temperature range SAL, PAL 0C to +70C Storage temperature range -65C to +150C Lead temperature, 10 seconds +260C CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS + - V = +5V V = GND T = 25C unless otherwise specified A ALD111933 Parameter Symbol Min Typ Max Unit Test Conditions Gate Threshold Voltage V 3.25 3.30 3.35 V I = 1A, V = 0.1V GS(th) DS DS Offset Voltage V 220 mVV - V OS GS(th)M1 GS(th)M2 I = 1A DS Offset Voltage Tempco TC 5 V/CV = V VOS DS1 DS2 GateThreshold Voltage Tempco TC -1.7 mV/CI = 1A, V = 0.1V VGS(th) DS DS 0.0 I = 20A, V = 0.1V DS DS +1.6 I = 40A, V = 0.1V DS DS 6.9 mA V = +10V, V = +5V GS DS Drain Source On Current I DS(ON) 3.0 mA V = +7.3V, V = +5V GS DS Forward Transconductance G 1.4 mmho V = +7.3V FS GS V = +9.8V DS Transconductance Mismatch G 1.8 % FS Output Conductance G 68 mho V = +7.3V OS GS V = +9.8V DS Drain Source On Resistance R 500 V = +7.3V DS(ON) GS V = 0.1V DS Drain Source On Resistance R 0.5 % V = +7.3V DS(ON) GS Mismatch V = 0.1V DS Drain Source Breakdown BV 10 V V = +2.3V DSX GS Voltage I = 1.0A DS 1 Drain Source Leakage Current I 10 100 pA V = +2.3V, V = 10V DS(OFF) GS DS 4nA T = 125C A 1 Gate Leakage Current I 330 pAV = 10V, V = 0V GSS GS DS 1nA T = 125C A Input Capacitance C 2.5 pF ISS Transfer Reverse Capacitance C 0.1 pF RSS + Turn-on Delay Time t 10 ns V = 5V, R = 5K on L + Turn-off Delay Time t 10 ns V = 5V, R = 5K off L Crosstalk 60 dB f = 100KHz 1 Notes: Consists of junction leakage currents ALD111933, Vers. 2.0 Advanced Linear Devices 2 of 10