AS4C128M32MD2A-25BIN Alliance Memory

AS4C128M32MD2A-18BIN AS4C128M32MD2A-25BIN Revision History 4Gb(128M x 32) /RZ 3RZHU DDR2 SDRAM AS4C128 0 32MD2 134ball FBGA PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet Dec. 2017 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 122 - Rev.1.0 Dec. 2017AS4C128M32MD2A-18BIN AS4C128M32MD2A-25BIN DDR2 Sync DRAM Features Functionality Configuration - VDD2 = 1.141.30V - 128 Meg X 32 (16 Meg X 32 X 8 Banks). - VDDCA/VDDQ = 1.141.30V Low Power Features - VDD1 = 1.701.95V - Low voltage power supply. - Interface : HSUL 12 - Auto TCSR (Temperature Compensated Self Refresh). - Data width : x32 - PASR (Partial Array Self Refresh) power-saving mode. - Clock frequency range : max 533MHz - DPD (Deep Power Down) Mode. - Four-bit pre-fetch DDR architecture - DS (Driver Strength) Control. - Eight internal banks for concurrent operation Timing Cycle time - Multiplexed, double data rate, command/address inputs - 1.875ns RL = 8 commands entered on every CK edge - 2.5ns RL = 6 - Bidirectional/differential data strobe per byte of - 3.0ns RL = 5 data(DQS/DQS ). Operating Temperature Ranges - DM masks write date at the both rising and falling edge - Industrial -40 to +85. of the data strobe Package - Programmable READ and WRITE latencies (RL/WL) - 134-Ball FBGA(10.0mm x 11.5mm x 1.0mm) - Programmable burst lengths: 4, 8, or 16 - Auto refresh and self refresh supported - All bank auto refresh and per bank auto refresh supported - Clock stop capability Table I. Ordering Information Product part No. Org Temperature Max Clock (MHz) Package AS4C128M32MD2A-18BIN 128M x 32 Industrial -40C to 85C 533 134-ball FBGA AS4C128M32MD2A-25BIN 128M x 32 Industrial -40C to 85C 400 134-ball FBGA Table II. Speed Grade Information WL Speed Grade Clock Frequency RL tRCD (ns) tRP (ns) DDR2L-800 3 18 18 400MHz 6 4 DDR2L-1066 533MHz 18 18 8 Confidential - 2 of 122 - Rev.1.0 Dec. 2017