AS4C16M16SA-Automotive Revision History Revision Details Date Rev 1.0 Preliminary datasheet February 2015 Rev 2.0 1. Remove AS4C16M16SA-7BAN, AS4C16M16SA-7TAN March 2015 parts. 2. Add part number system on the last page. Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice. Confidential 0 Rev. 2.0 Mar. /2015 AS4C16M16SA-Automotive 256M (16M x 16 bit) Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 2.0, Mar. /2015) Features Overview Fast access time from clock: 5 ns The 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is Fast clock rate: 166 MHz internally configured as 4 Banks of 4M word x 16 Fully synchronous operation DRAM with a synchronous interface (all signals are AEC-Q100 Compliant registered on the positive edge of the clock signal, Internal pipelined architecture CLK). Read and write accesses to the SDRAM are 4M word x 16-bit x 4-bank burst oriented accesses start at a selected location Programmable Mode registers and continue for a programmed number of locations in - CAS Latency: 2 or 3 a programmed sequence. Accesses begin with the - Burst Length: 1, 2, 4, 8, or full page registration of a BankActivate command which is then followed by a Read or Write command. - Burst Type: Sequential or Interleaved The SDRAM provides for programmable Read or - Burst stop function Write burst lengths of 1, 2, 4, 8, or full page, with a Auto Refresh and Self Refresh burst termination option. An auto precharge function 8192 refresh cycles/32ms may be enabled to provide a self-timed row precharge CKE power down mode that is initiated at the end of the burst sequence. The Automotive Ambient Temperature: -40~105 refresh functions, either Auto or Self Refresh are easy Single +3.3V 0.3V power supply to use. Interface: LVTTL By having a programmable mode register, the system 54-pin 400 mil plastic TSOP II package can choose the most suitable modes to maximize its performance. These devices are well suited for - Pb free and Halogen free applications requiring high memory bandwidth and 54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package particularly well suited to high performance PC - Pb free and Halogen free applications. Table 1. Key Specifications AS4C16M16SA-Automotive -6 tCK3 Clock Cycle time(min.) 6 ns tAC3 Access time from CLK (max.) 5 ns tRAS Row Active time(min.) 42 ns tRC Row Cycle time(min.) 60 ns Table 2.Ordering Information Part Number Frequency Package Temperature Temp Range AS4C16M16SA-6BAN 166MHz 54-Ball FBGA Automotive -40~105 AS4C16M16SA-6TAN 166MHz 54-Pin TSOPII Automotive -40~105 B: indicates FBGA package T: indicates TSOP II package A: Automotive N: indicates Pb and Halogen Free Confidential 1 Rev. 2.0 Mar. /2015