4Mx16 DDR1-AS4C4M16D1A Revision History AS4C4M16D1A - 66-pin TSOPII PACKAGE Revision Details Date Rev 1.1 Preliminary datasheet July 2015 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1/54 - Rev.1.1 July 20154Mx16 DDR1-AS4C4M16D1A Overview Features The AS4C4M16D1 DDR SDRAM is a high- Fast clock rate: 200 MHz speed CMOS double data rate synchronous DRAM Differential Clock CK & CK containing 64 Mbits. It is internally configured as a Bi-directional DQS quad 1M x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the DLL enable/disable by EMRS clock signal, CK). Data outputs occur at both rising Fully synchronous operation edges of CK and . Read and write accesses to CK Internal pipeline architecture the SDRAM are burst oriented accesses start at a Four internal banks, 1M x 16-bit for each bank selected location and continue for a programmed Programmable Mode and Extended Mode Registers number of locations in a programmed sequence. - CAS Latency: 2, 2.5, 3 Accesses begin with the registration of a - Burst length: 2, 4, 8 BankActivate command which is then followed by a - Burst Type: Sequential & Interleaved Read or Write command. Individual byte writes mask control The AS4C4M16D1 provides programmable Read or DM Write Latency = 0 Write burst lengths of 2, 4, 8. An auto precharge Auto Refresh and Self Refresh function may be enabled to provide a self-timed row 4096 refresh cycles / 64ms precharge that is initiated at the end of the burst Precharge & active power down sequence. The refresh functions, either Auto or Self Power supplies: V & V = 2.5V 0.2V Refresh are easy to use. In addition, AS4C4M16D1 DD DDQ features programmable DLL option. By having a Operating temperature: programmable mode register and extended mode - Commercial (0C~70 C) register, the system can choose the most suitable - Industrial (-40C~85C) modes to maximize its performance. These devices Interface: SSTL 2 I/O Interface are well suited for applications requiring high Package: 66 Pin TSOP II, 0.65mm pin pitch memory bandwidth and high performance. - Pb free and Halogen free Table 1. Ordering Information Clock Temperature Data Rate Product part No Package AS4C4M16D1A-5TCN 400Mbps/pin 66pin TSOPII 200MHz Commercial 0C to 70C AS4C4M16D 1A-5TIN 200MHz Industrial -40C to 85C 400Mbps/pin 66pin TSOPII Confidential - 2/54 - Rev.1.1 July 2015