AOD417 P-Channel Enhancement Mode Field Effect Transistor General Description Features The AOD417 uses advanced trench technology to provide excellent R , low gate charge and low V (V) = -30V DS(ON) DS gate resistance. With the excellent thermal resistance I = -25A (V = -10V) D GS of the DPAK package, this device is well suited for R < 34m (V = -10V) DS(ON) GS high current load applications. R < 55m (V = -4.5V) DS(ON) GS -RoHS Compliant 100% UIS Tested -Halogen Free* 100% Rg Tested TO-252 D-PAK D Bottom View Top View D G G S S S G Absolute Maximum Ratings T =25C unless otherwise noted A Parameter Symbol Maximum Units Drain-Source Voltage V -30 V DS Gate-Source Voltage V 20 V GS G T =25C -25 Continuous Drain A B,G Current T =100C I -20 A A D C Pulsed Drain Current I -60 DM C Avalanche Current I -14 A AR C Repetitive avalanche energy L=0.3mH E 30 mJ AR T =25C 50 C P W D B T =100C Power Dissipation 25 C T =25C 2.5 A P W DSM A Power Dissipation T =70C 1.6 A Junction and Storage Temperature Range T , T -55 to 175 C J STG Thermal Characteristics Parameter Symbol Typ Max Units A Maximum Junction-to-Ambient t 10s 16.7 25 C/W R JA A Steady-State Maximum Junction-to-Ambient 40 50 C/W D Steady-State Maximum Junction-to-Case R 2.5 3 C/W JC Alpha & Omega Semiconductor, Ltd. www.aosmd.comAOD417 Electrical Characteristics (T =25C unless otherwise noted) J Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV Drain-Source Breakdown Voltage I =-250A, V =0V -30 V D GS DSS V =-24V, V =0V -1 DS GS I Zero Gate Voltage Drain Current A DSS T =55C -5 J V =0V, V =20V I Gate-Body leakage current 100 nA GSS DS GS V Gate Threshold Voltage V =V I =-250A -1 -1.9 -3 V GS(th) DS GS D I On state drain current V =-10V, V =-5V -60 A GS DS D(ON) V =-10V, I =-20A 27 34 GS D m R Static Drain-Source On-Resistance T =125C 36 DS(ON) J V =-4.5V, I =-7A 40 55 m GS D g Forward Transconductance V =-5V, I =-20A 18 S FS DS D V Diode Forward Voltage I =-1A,V =0V -0.75 -1 V S GS SD I Maximum Body-Diode Continuous Current -6 A S DYNAMIC PARAMETERS C Input Capacitance 920 pF iss C Output Capacitance V =0V, V =-15V, f=1MHz 140 pF GS DS oss C Reverse Transfer Capacitance 90 pF rss V =0V, V =0V, f=1MHz R Gate resistance 6 9 GS DS g SWITCHING PARAMETERS Q (10V) Total Gate Charge (10V) 16.2 nC g Q (4.5V) Total Gate Charge (4.5V) 8.2 nC g V =-10V, V =-15V, I =-20A GS DS D Q Gate Source Charge 2.9 nC gs Q Gate Drain Charge 3.6 nC gd t Turn-On DelayTime 8 ns D(on) V =-10V, V =-15V, R =0.75, t Turn-On Rise Time 30 ns r GS DS L t Turn-Off DelayTime R =0.75 22 ns GEN D(off) t Turn-Off Fall Time 26 ns f t I =-20A, dI/dt=100A/s 23 rr Body Diode Reverse Recovery Time F ns Q I =-20A, dI/dt=100A/s 14 nC rr Body Diode Reverse Recovery Charge F A: The value of R JA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T =25C. The Power dissipation P is based on R (<10s) and the maximum allowed junction temperature of 150C. The value in any given A DSM JA application depends on the user s specific board design, and the maximum temperature of 175C may be u sed if the PCB allows it. B. The power dissipation P is based on T =175C, using junction-to-case thermal resistance, and is more useful in setting the upper D J(MAX) dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature T =175C. J(MAX) D. The R is the sum of the thermal impedence from junction to case R and case to ambient. JA JC E. The static characteristics in Figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T =175C. J(MAX) G. The maximum current rating is limited by bond-wires. H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T =25C. The SOA A curve provides a single pulse rating. ST *This device is guaranteed green after data code 8X11 (Sep 1 2008). Rev1: Sep. 2008 THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Alpha & Omega Semiconductor, Ltd. www.aosmd.com