REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add a new vendor, National Semiconductor with CAGE code 27014. Change 89-11-03 W. Heckman F for subgroups 10 and 11 from 70 MHz to 60 MHz in table I. Changed test MAX conditions of I from V = 5.5 V to V = GND. Editorial changes throughout. OD IN IN B AddChanges in accordance with NOR 5962-R152-93 . -tvn 93-05-05 M. L. Poelking C Update to reflect latest changes in format and requirements. Editorial changes 01-05-02 Raymond Monnin throughout. -les D Update drawing to current requirements. Editorial changes throughout. - gap 08-10-22 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS CHECKED BY COLUMBUS, OHIO 43218-3990 STANDARD Ray Monnin 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88555 01 E X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F378 Hex parallel D-type register with enable 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage ............................................................................... -0.5 V dc minimum to +7.0 V dc maximum Input voltage (V ) .......................................................................... -1.2 V dc at -18 mA to +7.0 V dc IN Storage temperature range ........................................................... -65C to +150 C Maximum power dissipation (P ) 1/ .............................................. 247 mW D Lead temperature (soldering, 10 seconds) .................................... +300C Thermal resistance, junction-to-case ( ) .................................... See MIL-STD-1835 JC Junction temperature (T ) .............................................................. +175C J 1.4 Recommended operating conditions. Supply voltage range (V ) ........................................................... 4.5 V dc minimum to 5.5 V dc maximum CC Minimum high level input voltage (V ) .......................................... 2.0 V dc IH Maximum low level input voltage (V ) ........................................... 0.8 V dc IL Case operating temperature range (T ) ........................................ -55C to +125 C C Minimum width of clock pulse high: T = +25 C ................................................................................. 4.0 ns C T = -55 C, +125 C ................................................................... 5.0 ns C Minimum width of clock pulse low: T = +25 C ................................................................................. 6.0 ns C T = -55 C, +125 C ................................................................... 7.5 ns C 1/ Must withstand the added P due to short circuit test, e.g., I . D OS SIZE STANDARD 5962-88555 A MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS REVISION LEVEL SHEET COLUMBUS, OHIO 43218-3990 D 2 DSCC FORM 2234 APR 97