PSMN010-80YL Nexperia

PSMN010-80YL N-channel 80 V, 10 m logic level MOSFET in LFPAK56 14 April 2016 Product data sheet 1. General description Logic level N-channel MOSFET in an LFPAK56 (Power SO8) package using TrenchMOS technology. This product is designed and qualified for use in a wide range of power supply & motor control equipment. 2. Features and benefits Advanced TrenchMOS provides low R and low gate charge DSon Logic level gate operation Avalanche rated, 100% tested LFPAK provides maximum power density in a Power SO8 package 3. Applications Synchronous rectification in power supply equipment Chargers & adaptors with V < 10 V out Fast charge & USB-PD applications Battery powered motor control LED lighting & TV backlight 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage 25 C T 175 C - - 80 V DS j I drain current V = 5 V T = 25 C Fig. 2 - - 84 A D GS mb P total power dissipation T = 25 C Fig. 1 - - 194 W tot mb Static characteristics R drain-source on-state V = 5 V I = 25 A T = 25 C Fig. 11 - 8.1 11 m DSon GS D j resistance Dynamic characteristics Q gate-drain charge I = 25 A V = 64 V V = 5 V - 13.2 - nC GD D DS GS T = 25 C Fig. 13 Fig. 14 j Scan or click this QR code to view the latest information for this productNXP Semiconductors PSMN010-80YL N-channel 80 V, 10 m logic level MOSFET in LFPAK56 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 S source mb D 2 S source G 3 S source mbb076 S 4 G gate 1 2 3 4 mb D mounting base connected to LFPAK56 Power- drain SO8 (SOT669) 6. Ordering information Table 3. Ordering information Type number Package Name Description Version PSMN010-80YL LFPAK56 Plastic single-ended surface-mounted package SOT669 Power-SO8 (LFPAK56 Power-SO8) 4 leads 7. Marking Table 4. Marking codes Type number Marking code PSMN010-80YL 010L80 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage 25 C T 175 C - 80 V DS j V drain-gate voltage R = 20 k - 80 V DGR GS V gate-source voltage -20 20 V GS P total power dissipation T = 25 C Fig. 1 - 194 W tot mb I drain current V = 5 V T = 25 C Fig. 2 - 84 A D GS mb V = 5 V T = 100 C Fig. 2 - 59.3 A GS mb I peak drain current pulsed t 10 s T = 25 C Fig. 3 - 336 A DM p mb T storage temperature -55 175 C stg PSMN010-80YL All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved Product data sheet 14 April 2016 2 / 13