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Advancements in both silicon and Max r = 13.0 m : at V = 4.5 V, I = 10.9 A DS(on) GS D package technologies have been combined to offer the lowest Advanced Package and Silicon combination r while maintaining excellent switching performance. DS(on) for low r and high efficiency DS(on) Applications MSL1 robust package design Synchronous Buck for Notebook Vcore and Server RoHS Compliant Notebook Battery Pack Load Switch Top Bottom Pin 1 S G D 5 4 S S G S D 6 3 D S 7 2 D D S D 8 1 D D Power 56 MOSFET Maximum Ratings T = 25 C unless otherwise noted A Symbol Parameter Ratings Units V Drain to Source Voltage 30 V DS V Gate to Source Voltage 20 V GS Drain Current -Continuous (Package limited) T = 25 C 21 C -Continuous (Silicon limited) T = 25 C 51 C I A D -Continuous T = 25 C (Note 1a) 13.5 A -Pulsed 80 E Single Pulse Avalanche Energy (Note 3) 60 mJ AS Power Dissipation T = 25 C 42 C P W D Power Dissipation T = 25 C (Note 1a) 2.5 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 3.3 T JC C/W R Thermal Resistance, Junction to Ambient (Note 1a) 50 T JA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS8880 FDMS8880 Power 56 13 12 mm 3000 units 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 1 FDMS8880 Rev.C2