MC100LVEL59DWG

MC100LVEL59 3.3VECL Triple 2:1 Multiplexer Description The MC100LVEL59 is a 3.3V triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be www.onsemi.com controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random logic applications. Features Individual or Common Select Controls 500 ps Typical Propagation Delays ESD Protection: > 2 kV HBM SOIC20 WB The 100 Series Contains Temperature Compensation DW SUFFIX PECL Mode Operating Range: V = 3.0 V to 3.8 V CC CASE 751D with V = 0 V EE NECL Mode Operating Range: V = 0 V CC with V = 3.0 V to 3.8 V EE Internal Input Pulldown Resistors MARKING DIAGRAM* Q Output will Default LOW with Inputs Open or at V EE Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 20 Moisture Sensitivity: Level 3 (Pb-free) For Additional Information, see Application Note AND8003/D 100LVEL59 Flammability Rating: UL 94 VO @ 0.125 in, AWLYYWWG Oxygen Index 28 to 34 Transistor Count = 182 devices 1 These Devices are Pb-Free and are ROHS Compliant A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping MC100LVEL59DWG SOIC20 WB 38 Units/Tube (Pb-Free) Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 5 MC100LVEL59/DMC100LVEL59 V Q0 Q0 V Q1 Q1 V Q2 Q2 V CC CC CC EE 20 19 18 17 16 15 14 13 12 11 10 10 10 1 2 3 4 5 678 9 10 COM_SEL D0a D0b SEL0 D1a D1b SEL1 D2a D2b SEL2 Warning: All V and V pins must be externally connected CC EE to Power Supply to guarantee proper operation. Figure 1. Logic Diagram and Pinout: 20Lead SOIC (Top View) Table 1. PIN DESCRIPTION Pins Function Table 2. TRUTH TABLE D0a-D2a ECL Input Data a D0b-D2b ECL Input Data b SEL Data SEL0-SEL2 ECL Individual Select Input H a COM_SEL ECL Common Select Input L b Q0-Q2; Q0-Q2 ECL Differential Outputs V Positive Supply CC V Negative Supply EE Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply V = 0 V 8 to 0 V CC EE V NECL Mode Power Supply V = 0 V 8 to 0 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 to 0 V I EE I CC NECL Mode Input Voltage V = 0 V V V 6 to 0 CC I EE I Output Current Continuous 50 mA out Surge 100 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg  Thermal Resistance (Junction to Ambient) 0 lfpm SOIC20 WB 140 C/W JA 500 lfpm 100  Thermal Resistance (Junction to Case) Standard Board SOIC20 WB 30 to 35 C/W JC T Wave Solder < 2 to 3 sec @ 248C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2