Product Specification PE43703 50 RF Digital Attenuator 7-bit, 31.75 dB, 9 kHz - 6000 MHz Product Description Vss option EXT The PE43703 is a HaRP-enhanced, high linearity, 7-bit RF Digital Step Attenuator (DSA). This highly versatile DSA Features covers a 31.75 dB attenuation range in 0.25 dB, 0.5 dB, or 1.0 HaRP-enhanced UltraCMOS device dB steps. The customer can choose which step size and Attenuation options: 0.25 dB, 0.5 dB, or associated specifications are best suited for their application. The Peregrine 50 RF DSA provides multiple CMOS control 1.0 dB steps to 31.75 dB interfaces and an optional external Vss feature. It maintains 0.25 dB monotonicity for 4.0 GHz high attenuation accuracy over frequency and temperature and 0.5 dB monotonicity for 5.0 GHz exhibits very low insertion loss and low power consumption. 1 dB monotonicity for 6.0 GHz Performance does not change with V due to on-board DD High Linearity: Typical +59 dBm IIP3 regulator. This next generation Peregrine DSA is available in a Excellent low-frequency performance 5x5 mm 32-lead QFN footprint. Optional External Vss Control (Vss ) EXT The PE43703 is manufactured on Peregrines UltraCMOS 3.3 V or 5.0 V Power Supply Voltage process, a patented variation of silicon-on-insulator (SOI) Fast switch settling time technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional Programming Modes: CMOS. Direct Parallel Latched Parallel Figure 1. Package Type Serial-Addressable: Program up to 32-lead 5x5x0.85 mm QFN Package eight addresses 000 - 111 High-attenuation state power-up (PUP) CMOS Compatible No DC blocking capacitors required Figure 2. Functional Schematic Diagram Switched Attenuator Array RF Output RF Input 7 Parallel Control Serial In Control Logic Interface CLK LE (optional) A0 A1 A2 P/S Vss EXT Document No. 70-0245-05 www.psemi.com 2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 15 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: PE43703 Product Specification Table 1. Electrical Specifications: 0.25 dB steps +25C, V = 3.3 V or 5.0 V, Vss = -2.7 V or GND DD EXT Parameter Test Conditions Frequency Min Typical Max Units Frequency Range 9 kHz 4000 MHz Attenuation Range 0.25 dB Step 0 31.75 dB Insertion Loss 9 kHz 4 GHz 1.9 2.4 dB 0 dB - 7.75 dB Attenuation settings 9 kHz < 3 GHz (0.2+1.5%) dB Attenuation Error 8 dB - 31.75 dB Attenuation settings 9 kHz < 3 GHz (0.15+4%) dB 0 dB - 31.75 dB Attenuation settings 3 GHz < 4 GHz (0.25+4.5%) dB Return Loss 9 kHz - 4 GHz 18 dB Relative Phase All States 9 kHz - 4 GHz 33 deg P1dB (note 1) Input 20 MHz - 4 GHz 30 32 dBm IIP3 Two tones at +18 dBm, 20 MHz spacing 20 MHz - 4 GHz 59 dBm 2 Typical Spurious Value Vss grounded 1 MHz -110 dBm EXT Video Feed Through 10 mVpp Switching Time 50% DC CTRL to 10% / 90% RF 650 ns RF Trise/Tfall 10% / 90% RF 400 ns RF settled to within 0.05 dB of final value. Settling Time 4 25 s RBW = 5 MHz, Averaging ON. Notes: 1. Please note Maximum Operating Pin (50 ) of +23dBm as shown in Table 5. 2. To prevent negative voltage generator spurs, supply 2.7 volts to Vss . EXT Performance Plots, 0.25 dB step Figure 4. 0.25 dB Step, Actual vs. Ideal Attenuation Figure 3. 0.25 dB Step Attenuation* 0.25-dB PE43701 Attenuation 200 MHz 900 MHz 1800 MHz 2200 MHz 3000 MHz 35 0.50 900 MHz 1800 MHz 30 2200 MHz 3000 MHz 25 0.25 20 15 0.00 10 5 0 -0.25 0 4 8 12 16 20 24 28 32 035 1015 2025305 Attenuation Setting (dB) Ideal Attenuation (dB) *Monotonicity is held so long as Step-Attenuation does not cross below -0.25 Attenuation State Figure 5. 0.25 dB Major State Bit Error Figure 6. 0.25 dB Attenuation Error 200 MHz 900 MHz 1800 MHz 0.25dB State 0.5dB State 1dB State 2dB State 2200 MHz 3000 MHz 4000 MHz 4dB State 8dB State 16dB State 31.75dB State 1.5 1.5 1.0 1.0 0.5 0.5 0.0 0.0 -0.5 -0.5 -1.0 -1.0 -1.5 -1.5 0 1000 2000 3000 4000 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 32.0 Frequency (MHz) Attenuation Setting (dB) 2008-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0245-05 UltraCMOS RFIC Solutions Page 2 of 15 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: