Product Information

8T49N244A-999ASGI

8T49N244A-999ASGI electronic component of Renesas

Datasheet
Clock Generators & Support Products Femto NG Clock Generator

Manufacturer: Renesas
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

184: USD 55.8204 ea
Line Total: USD 10270.95

0 - Global Stock
MOQ: 184  Multiples: 184
Pack Size: 184
Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 184
Multiples : 184
184 : USD 55.8204

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Type
Maximum Input Frequency
Max Output Freq
Number of Outputs
Duty Cycle - Max
Operating Supply Voltage
Operating Supply Current
Maximum Operating Temperature
Minimum Operating Temperature
Mounting Style
Package / Case
Series
Height
Length
Output Type
Packaging
Width
Brand
Jitter
Moisture Sensitive
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FemtoClock NG Dual Universal IDT8T49N244I Frequency Translator DATASHEET General Description Features The IDT8T49N244I is a dual PLL using FemtoClock NG Fourth generation FemtoClock NG technology technology. It integrates low phase noise Frequency Translation / Two fully independent PLLs Synthesis and Jitter attenuation. It includes alarm and monitoring TM Universal Frequency Translator /Frequency Synthesizer and functions suitable for networking and communications applications. Jitter attenuator The device has two fully independent PLLs. Each PLL is able to Outputs are programmable as LVPECL or LVDS generate any output frequency in the 0.98MHz - 312.5MHz range Programmable output frequency: 0.98MHz up to 1,300MHz and most output frequencies in the 312.5MHz - 1,300MHz range (see Table 3 for details). A wide range of input reference clocks may Two differential inputs per PLL support the following input types: be used as the source for the output frequencies. LVPECL, LVDS, LVHSTL, HCSL Each PLL of IDT8T49N244I has three operating modes to support a Input frequency range: 8kHz - 710MHz (Low-Bandwidth mode) very broad spectrum of applications: Input frequency range: 16MHz - 710MHz (High-Bandwidth mode) 1) Frequency Synthesizer REFCLK frequency range: 16MHz - 40MHz Synthesizes output frequencies from an external reference Input clock monitor on each PLL will smoothly switch between clock REFCLK. redundant input references Fractional feedback division is used, so there are no Factory-set register configuration for power-up default state requirements for any specific input reference clock frequency to Power-up default configuration produce the desired output frequency with a high degree of accuracy. Configuration customized via One-Time Programmable ROM 2 2) High-Bandwidth Frequency Translator Settings may be overwritten after power-up via I C 2 Applications: PCI Express, Computing, General Purpose I C Serial interface for register programming Translates any input clock in the 16MHz - 710MHz frequency RMS phase jitter at 161.1328125MHz, using a 40MHz REFCLK range into any supported output frequency. (12kHz - 20MHz): 486fs (typical), Low Bandwidth Mode (FracN) This mode has a high PLL loop bandwidth in order to track input RMS phase jitter at 400MHz, using a 40MHz REFCLK reference changes, such as Spread-Spectrum Clock (12kHz - 20MHz): 326fs (typical), Synthesizer Mode (Integer FB) modulation. Supply modes: 3) Low-Bandwidth Frequency Translator V / V / V CC CCA CCO Applications: Networking & Communications. 3.3V / 3.3V / 3.3V 3.3V / 3.3V / 2.5V (LVPECL only) Translates any input clock in the 8kHz -710MHz frequency range into any supported output frequency. 2.5V / 2.5V / 2.5V This mode supports PLL loop bandwidths in the 10Hz - 580Hz -40C to 85C ambient operating temperature range and makes use of an external REFCLK to provide 10mm X 10mm CABGA package significant jitter attenuation. Lead-free (RoHS 6) packaging Each PLL provides factory-programmed default power-up configuration burned into One-Time Programmable (OTP) memory. The configuration is specified by customer and are programmed by IDT during the final test phase from an on-hand stock of blank devices. To implement other configurations, these power-up default settings 2 can be overwritten after power-up using the I C interface and the device can be completely reconfigured. IDT8T49N244AASGI REVISION A FEBRUARY 15, 2013 1 2013 Integrated Device Technology, Inc. IDT8T49N244I Data Sheet FemtoClock NG Dual Universal Frequency Translator Complete Block Diagram LOCKA Output Divider 1 Q0A x2 N FemtoClock NG nQ0A PD/LF 0 VCO 1995 - 2600 MHz Q1A Feedback Divider nQ1A M INT M FRAC LF1A C ADC 3 R CLK0A 3 0 nCLK0A P R S LF0A CLK1A 1 PD/CP nCLK1A 4 M1 CLK SELA C C P S LOCKB Output Divider 1 Q0B x2 N FemtoClock NG nQ0B PD/LF 0 VCO 1995 - 2600 MHz Q1B Feedback Divider nQ1B M INT M FRAC LF1B ADC C 3 R CLK0B 3 0 nCLK0B P R S LF0B CLK1B 1 PD/CP nCLK1B 4 M1 CLK SELB C P C S PLL BYPASS Control Logic POR REFCLK SCLK P T Global Registers O SDATA IDT8T49N244AASGI REVISION A FEBRUARY 15, 2013 2 2013 Integrated Device Technology, Inc.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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