STM32L051x6 STM32L051x8 Access line ultra-low-power 32-bit MCU Arm -based Cortex -M0+, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC Datasheet - production data Features )%* Ultra-low-power platform 1.65 V to 3.6 V power supply -40 to 125 C temperature range Standard and TFBGA64 LQFP32 (7x7 mm) UFQFPN32 thin WLCSP36 (5x5 mm) 0.27 A Standby mode (2 wakeup pins) LQFP48 (7x7 mm) (5x5 mm) (2.61x2.88 mm) LQFP64 (10x10 mm) UFQFPN48 0.4 A Stop mode (16 wakeup lines) (7x7 mm) 0.8 A Stop mode + RTC + 8-Kbyte RAM retention Rich Analog peripherals 88 A/MHz in Run mode 12-bit ADC 1.14 Msps up to 16 channels (down 3.5 s wakeup time (from RAM) to 1.65 V) 5 s wakeup time (from Flash memory) 2x ultra-low-power comparators (window mode Core: Arm 32-bit Cortex -M0+ with MPU and wake up capability, down to 1.65 V) From 32 kHz up to 32 MHz max. 7-channel DMA controller, supporting ADC, SPI, 0.95 DMIPS/MHz I2C, USART, Timers Memories 7x peripheral communication interfaces Up to 64-Kbyte Flash memory with ECC 2x USART (ISO 7816, IrDA), 1x UART (low 8-Kbyte RAM power) 2 Kbytes of data EEPROM with ECC Up to 4x SPI 16 Mbits/s 20-byte backup register 2x I2C (SMBus/PMBus) Sector protection against R/W operation 9x timers: 1x 16-bit with up to 4 channels, 2x 16-bit Up to 51 fast I/Os (45 I/Os 5V tolerant) with up to 2 channels, 1x 16-bit ultra-low-power timer, 1x SysTick, 1x RTC, 1x 16-bit basic, and 2x Reset and supply management watchdogs (independent/window) Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds CRC calculation unit, 96-bit unique ID Ultra-low-power POR/PDR All packages are ECOPACK2 Programmable voltage detector (PVD) Table 1. Device summary Clock sources Reference Part number 1 to 25 MHz crystal oscillator 32 kHz oscillator for RTC with calibration STM32L051C6, STM32L051K6, STM32L051x6 STM32L051R6, STM32L051T6 High speed internal 16 MHz factory-trimmed RC (+/- 1%) STM32L051C8, STM32L051K8, STM32L051x8 Internal low-power 37 kHz RC STM32L051R8, STM32L051T8 Internal multispeed low-power 65 kHz to 4.2 MHz RC PLL for CPU clock Pre-programmed bootloader USART, SPI supported Development support Serial wire debug supported October 2019 DS10184 Rev 10 1/133 This is information on a product in full production. www.st.comContents STM32L051x6 STM32L051x8 Contents 1 Introduction 9 2 Description 10 2.1 Device overview .11 2.2 Ultra-low-power device continuum 13 3 Functional overview 14 3.1 Low-power modes 14 3.2 Interconnect matrix 18 3.3 Arm Cortex-M0+ core with MPU . 19 3.4 Reset and supply management 20 3.4.1 Power supply schemes . 20 3.4.2 Power supply supervisor 20 3.4.3 Voltage regulator 21 3.5 Clock management . 21 3.6 Low-power real-time clock and backup registers . 24 3.7 General-purpose inputs/outputs (GPIOs) . 24 3.8 Memories . 25 3.9 Boot modes . 25 3.10 Direct memory access (DMA) . 26 3.11 Analog-to-digital converter (ADC) 26 3.12 Temperature sensor . 26 3.12.1 Internal voltage reference (V ) . 27 REFINT 3.13 Ultra-low-power comparators and reference voltage 27 3.14 System configuration controller 28 3.15 Timers and watchdogs . 28 3.15.1 General-purpose timers (TIM2, TIM21 and TIM22) 28 3.15.2 Low-power Timer (LPTIM) . 29 3.15.3 Basic timer (TIM6) . 29 3.15.4 SysTick timer . 29 3.15.5 Independent watchdog (IWDG) . 29 3.15.6 Window watchdog (WWDG) . 29 2/133 DS10184 Rev 10