TC75S101F(TE85L,F) Toshiba

TC75S101F/FU/FE TOSHIBA CMOS Linear Integrated Circuit Silicon Monolithic TC75S101F, TC75S101FU, TC75S101FE Single Operational Amplifier (Input and Output Full Range) Features TC75S101F Input and Output Full Range Low-input offset voltage : V = 3.0 mV (max.) IO Low-input bias current : I = 0.1 pA (typ.) I Built-in phase-compensated op-amp, obviating the need for any external device Ultra-small package (SMV) SSOP5-P-0.95 Absolute Maximum Ratings (Ta = 25C) TC75S101FU Characteristics Symbol Rating Unit Supply voltage V , V 6 V DD SS Differential input voltage DV 6 V IN Input voltage V V to V V IN DD SS TC75S101F/FU 200 Power dissipation P mW D TC75S101FE 100 (USV) SSOP5-P-0.65A TC75S101FE Operating temperature T -40 to 85 C opr Storage temperature T -55 to 125 C stg Product device does not use these for open-loop configuration. Using continuously under heavy loads (e.g. the application of high (ESV) SON5-P-0.50 temperature/current/voltage and the significant change in Weight temperature, etc.) may cause this product to decrease in the SSOP5-P-0.95 : 14 mg (typ.) reliability significantly even if the operating conditions (i.e. operating SSOP5-P-0.65A : 6.2 mg (typ.) temperature/current/voltage, etc.) are within the absolute maximum SON5-P-0.50 : 3.0 mg (typ.) ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc) Operating Conditions Characteristics Symbol Rating Unit 1.5 to 5.5 Supply voltage V , V V DD SS 0.75 to 2.75 Start of commercial production 2007-12 1 2014-03-01 TC75S101F/FU/FE Marking (top view) Pin Connection (top view) V OUT DD 5 4 S J 1 2 3 IN (+) V IN () SS Electrical Characteristics DC Characteristics (V = 3.0 V, V = GND, Ta = 25C) DD SS Characteristics Symbol Test Condition MinTyp. Max Unit Input offset voltage V R = 1 , R = 100 k 1.2 3.0 mV IO S F Input offset current I 0.1 pA IO Input bias current I 0.1 pA I Common mode input voltage CMV R = 1 , R = 100 k 0 3.0 V IN S F Voltage gain (open loop) G 40 110 dB V V R 100 k 2.9 OH L Maximum output voltage V V R 100 k 0.1 OL L Common mode input signal CMRR V = 0.0 to 3.0 V 50 66 dB IN rejection ratio Supply voltage rejection ratio SVRR V = 1.8 to 6.0 V 65 90 dB DD Supply current I 63 90 A DD Source current Isource 70 110 A Sink current Isink 800 1500 A DC Characteristics (V = 1.8 V, V = GND, Ta = 25C) DD SS Characteristics Symbol Test Condition MinTyp. Max Unit Input offset voltage V R = 1 , R = 100 k 0.9 3.0 mV IO S F Input offset current I 0.1 pA IO Input bias current I 0.1 pA I Common mode input voltage CMV R = 1 , R = 100 k 0 1.8 V IN S F Voltage gain (open loop) G 40 100 dB V V R 100 k 1.7 OH L Maximum output voltage V V R 100 k 0.1 OL L Supply current I 57 80 A DD Source current Isource 50 95 A Sink current Isink 700 1450 A 2 2014-03-01