Si5997DU Vishay Siliconix Dual P-Channel 30 V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 V (V) R ( )I (A) Q (Typ.) DS DS(on) D g Definition a 0.054 at V = - 10 V - 6 TrenchFET Power MOSFET GS - 30 4.8 nC a New Thermally Enhanced PowerPAK 0.088 at V = - 4.5 V - 6 GS ChipFET Package - Small Footprint Area - Low On-Resistance - Thin 0.8 mm Profile PowerPAK ChipFET Dual 100 % R Tested g 1 Compliant to RoHS Directive 2002/95/EC 2 S 1 APPLICATIONS 3 Load Switch for Portable Devices G 1 D 1 DC/DC Converters S S 1 2 4 8 S2 D 1 7 G2 D 2 Marking Code 6 D 2 G G 1 2 DF XXX 5 Lot Traceability and Date Code Part Code Bottom View D D 1 2 Ordering Information: Si5997DU-T1-GE3 (Lead (Pb)-free and Halogen-free) P-Channel MOSFET P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V - 30 DS V V Gate-Source Voltage 20 GS a T = 25 C C - 6 a T = 70 C C - 6 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A - 5.1 b, c T = 70 C A A - 4.1 Pulsed Drain Current (t = 300 s) I - 25 DM a T = 25 C C - 6 Continuous Source-Drain Diode Current I S b, c T = 25 C A - 1.9 T = 25 C 10.4 C T = 70 C 6.7 C Maximum Power Dissipation P W D b, c T = 25 C A 2.3 b, c T = 70 C A 1.5 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 5 s R Maximum Junction-to-Ambient 43 55 thJA C/W R Maximum Junction-to-Case (Drain) Steady State 9.5 12 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/ppg 73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 105 C/W. Document Number: 67186 www.vishay.com S10-2762-Rev. A, 29-Nov-10 1Si5997DU Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = - 250 A - 30 V DS GS D V Temperature Coefficient V /T - 22 DS DS J I = - 250 A mV/C D V Temperature Coefficient V /T 4.1 GS(th) GS(th) J Gate-Source Threshold Voltage V V = V , I = - 250 A - 1.2 - 2.4 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = - 30 V, V = 0 V - 1 DS GS Zero Gate Voltage Drain Current I A DSS V = - 30 V, V = 0 V, T = 55 C - 10 DS GS J a I V - 5 V, V = - 10 V - 20 A On-State Drain Current D(on) DS GS V = - 10 V, I = - 3 A 0.045 0.054 GS D a R Drain-Source On-State Resistance DS(on) V = - 4.5 V, I = - 1 A 0.072 0.088 GS D a g V = - 15 V, I = - 3 A 7S Forward Transconductance fs DS D b Dynamic C Input Capacitance 430 iss Output Capacitance C V = - 15 V, V = 0 V, f = 1 MHz 90 pF oss DS GS C Reverse Transfer Capacitance 70 rss V = - 15 V, V = - 10 V, I = - 5.1 A 9.5 14.5 DS GS D Total Gate Charge Q g 4.8 7.5 nC Q V = - 15 V, V = - 4.5 V, I = - 5.1 A Gate-Source Charge 1.6 gs DS GS D Gate-Drain Charge Q 2.2 gd R Gate Resistance f = 1 MHz 2 8 16 g t Turn-On Delay Time 35 70 d(on) t Rise Time 25 50 r V = - 15 V, R = 3.7 DD L I - 4.1 A, V = - 4.5 V, R = 1 t Turn-Off Delay Time D GEN g 17 35 d(off) Fall Time t 10 20 f ns t Turn-On Delay Time 10 20 d(on) t Rise Time V = - 15 V, R = 3.7 10 20 r DD L I - 4.1 A, V = - 10 V, R = 1 t Turn-Off Delay Time D GEN g 20 40 d(off) t Fall Time 10 20 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current - 6 S C A I Pulse Diode Forward Current - 25 SM Body Diode Voltage V I = - 4.1 A, V = 0 V - 0.85 - 1.2 V SD S GS t Body Diode Reverse Recovery Time 15 30 ns rr Body Diode Reverse Recovery Charge Q 815 nC rr I = - 4 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 10.5 a ns t Reverse Recovery Rise Time 4.5 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 67186 2 S10-2762-Rev. A, 29-Nov-10