SIZ350DT-T1-GE3 Vishay

3 mm3 mm SiZ350DT www.vishay.com Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFET FEATURES PowerPAIR 3 x 3 TrenchFET Gen IV power MOSFET G 2 S 2 8 High side and low side MOSFETs form optimized S 7 2 combination for 50 % duty cycle S 2 6 5 - Q and R - Q FOM elevates Optimized R S /D DS g DS gd 1 2 (Pin 9) efficiency for high frequency switching D 1 100 % R and UIS tested g 1 Material categorization: for definitions of compliance 2 G 1 3 please see www.vishay.com/doc 99912 D 1 11 4 D 1 D 1 D APPLICATIONS 1 Top View Bottom View Synchronous buck DC/DC conversion G 1 Half bridge PRODUCT SUMMARY N-Channel 1 POL MOSFET CHANNEL-1 AND CHANNEL-2 S /D 1 2 MOSFET V (V) 30 DS R max. ( ) at V = 10 V 0.00675 DS(on) GS R max. () at V = 4.5 V 0.00944 DS(on) GS G 2 Q typ. (nC) 6.3 g a, d I (A) 30 D N-Channel 2 MOSFET Configuration Dual S 2 ORDERING INFORMATION Package PowerPAIR 3 x 3 Lead (Pb)-free and halogen-free SiZ350DT-T1-GE3 ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A CHANNEL-1 AND CHANNEL-2 PARAMETER SYMBOL LIMIT UNIT Drain-source voltage V 30 DS V Gate-source voltage V +16 / -12 GS a T = 25 C 30 C a T = 70 C 30 C Continuous drain current (T = 150 C) I J D b, c T = 25 C 18.5 A b, c T = 70 C 14.8 A A Pulsed drain current (t = 100 s) I 100 DM T = 25 C 13.9 C Continuous source current (MOSFET diode conduction) I S b, c T = 25 C 3.1 A Single pulse avalanche current I 10 AS L = 0.1 mH Single pulse avalanche energy E 5mJ AS T = 25 C 16.7 C T = 70 C 10.7 C Maximum power dissipation P W D b, c T = 25 C 3.7 A b, c T = 70 C 2.4 A Operating junction and storage temperature range T , T -55 to +150 J stg C Soldering recommendations (peak temperature) 260 Notes a. Package limited b. Surface mounted on 1 x 1 FR4 board c. t = 10 s d. T = 25 C C S17-1893-Rev. A, 25-Dec-17 Document Number: 76540 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 3 mm3 mm SiZ350DT www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS CHANNEL-1 AND CHANNEL-2 PARAMETER SYMBOL TYPICAL MAXIMUM UNIT a, b Maximum junction-to-ambient t 10 s R 27 34 thJA C/W Maximum junction-to-case (drain) Steady state R 67.5 thJC Notes a. Surface mounted on 1 x 1 FR4 board b. Maximum under steady state conditions is 69 C/W SPECIFICATIONS (T = 25 C, unless otherwise noted) J CHANNEL-1 AND CHANNEL-2 PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage V V = 0 V, I = 250 A 30 - - DS GS D V Gate-source threshold voltage V V = V , I = 250 A 1 - 2.4 GS(th) DS GS D Gate-source leakage I V = 0 V, V = +16 V / -12 V - - 100 nA GSS DS GS V = 30 V, V = 0 V - - 1 DS GS Zero gate voltage drain current I A DSS V = 30 V, V = 0 V, T = 55 C - - 5 DS GS J a On-state drain current I V 5 V, V = 10 V 40 - - A D(on) DS GS V = 10 V, I = 15 A - 0.00563 0.00675 GS D a Drain-source on-state resistance R DS(on) V = 4.5 V, I = 10 A - 0.00787 0.00944 GS D a Forward transconductance g V = 10 V, I = 15 A - 46 - S fs DS D b Dynamic Input capacitance C - 940 - iss Output capacitance C - 375 - pF oss V = 15 V, V = 0 V, f = 1 MHz DS GS Reverse transfer capacitance C -40- rss C /C ratio - 0.043 0.086 rss iss V = 15 V, V = 10 V, I = 18.5 A - 13.5 20.3 DS GS D Total gate charge Q g -6.3 10 nC Gate-source charge Q V = 15 V, V = 4.5 V, I = 18.5 A -2.8 - gs DS GS D Gate-drain charge Q -1.2 - gd Gate resistance R f = 1 MHz 0.2 0.8 1.6 g Turn-on delay time t -10 20 d(on) Rise time t -25 50 r V = 15 V, R = 1 , I 14.8 A, DD L D V = 10 V, R = 1 GEN g Turn-off delay time t -15 30 d(off) Fall time t -10 20 f ns Turn-on delay time t -15 30 d(on) Rise time t -45 68 r V = 15 V, R = 1 , I 14.8 A, DD L D V = 4.5 V, R = 1 GEN g Turn-off delay time t -10 20 d(off) Fall time t -25 50 f S17-1893-Rev. A, 25-Dec-17 Document Number: 76540 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000