A product Line of Pb Diodes Incorporated Lead-free Green PI6CG33201C 3.3V Very Low Power 2-Output PCIe Clock Generator With On-chip Termination Features Description 3.3V Supply Voltage e Th PI6CG33201C is a 2-output very low power PCIe Gen1/Gen2/ Crystal/CMOS input: 25 MHz Gen3/Gen4/Gen5 clock generator. It uses 25MHz crystal or CMOS reference as an input to generate the 100MHz low power dif- 2 Differential low power HCSL outputs with on-chip termination ferential HCSL outputs with on-chip terminations. The on-chip termination can save 8 external resistors and make layout easier. Default Z = 100 OUT An additional buffered reference output is provided to serve as a Individual output enable low noise reference for other circuitry. Reference CMOS output Programmable slew rate and output amplitude for each output It uses Diodes proprietary PLL design to achieve very low Differential outputs blocked until PLL is locked jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 require- ments. It also provides various options such as different slew rate Selectable 0%, -0.25% or -0.5% spread on differential outputs and amplitude through SMBUS so that users can configure the Strapping pins or SMBus for configuration device easily to get the optimized performance for their individ- Differential Output-To-Output Skew <50ps ual boards. The device also supports selectable spread-spectrum Very-Low Jitter Outputs options to reduce EMI for various applications. Differential Cycle-To-Cycle Jitter <50ps PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Compliant CMOS REFOUT Phase Jitter Block Diagram < 0.3ps RMS, SSC off <1.5ps RMS, SSC on REFOUT OE 1:0 Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. Green Device (Note 3) Q1 For automotive applications requiring specic cfi hange control XTAL IN/CLK OSC PLL XTAL OUT (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, SS Q0 and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. SCLK SDATA SADR A product Line of Diodes Incorporated PI6CG33201C Pin Configuration 24 23 22 21 20 19 XTAL IN/CLK 1 Q1- 18 Q1+ XTAL OUT 2 17 VDD OSC 3 16 VDDA GND SADR/REFOUT 4 15 GNDA GND REF 5 14 Q0- GND DIG Q0+ 6 13 7 8 9 10 11 12 Pin Description Pin Pin Name Type Description 1 XTAL IN/CLK Input Crystal input or CMOS reference input 2 XTAL OUT Output Crystal output 3 V Power Power supply for oscillation circuit, nominal 3.3V DD OSC Input/ Latch to select SMBus Address or LVCMOS REFOUT. 4 SADR/REFOUT CMOS Output This pin has an internal pull-down 5 GND REF Power Ground for REFOUT 6 GND DIG Power Ground for digital circuitry 7 V DIG Power Power supply for digital circuitry, nominal 3.3V DD 8 SCLK Input CMOS SMBUS clock input, 3.3V tolerant Input/ 9 SDATA CMOS SMBUS Data line, 3.3V tolerant Output 10, 21, 24 GND Power Ground pin 11, 20 V Power Power supply, nominal 3.3V DD Active low input for enabling Q0 pair. This pin has an internal pull-down. 12 OE0 Input CMOS 1 =disable outputs, 0 = enable outputs 13 Q0+ Output HCSL Differential true clock output 14 Q0- Output HCSL Differential complementary clock output 15 GNDA Power Ground for analog circuitry 16 V Power Power supply for analog circuitry DDA www.diodes.com January 2020 PI6CG33201C 2 Diodes Incorporated Document Number DS42291 Rev 3-2 V DIG DD GND SS SEL TRI SCLK SDATA PD GND GND V V DD DD OE1 OE0