IPD60R210PFD7S MOSFET DPAK 600V CoolMOS PFD7 SJ Power Device CoolMOS is a revolutionary technology for high voltage power tab MOSFETs, designed according to the superjunction (SJ) principle and pioneered by Infineon Technologies. The latest CoolMOS PFD7 is an optimized platform tailored to target cost sensitive applications in consumer markets such as charger, adapter, motor drive, lighting, etc. The new series provides all the benefits of a fast switching Superjunction 2 1 MOSFET, combined with an excellent price/performance ratio and state of the art ease-of-use level. The technology meets highest efficiency 3 standards and supports high power density, enabling customers going towards very slim designs. Drain Features Pin 2, Tab Extremely low losses due to very low FOM R *Q and R *E DS(on) g DS(on) oss Low switching losses E , excellent thermal behavior oss *1 Gate Pin 1 Fast body diode Wide range portfolio of R and package variations DS(on) Source *1: Internal body diode Pin 3 Benefits Enables high power density designs and small form factors Enables efficiency gains at higher switching frequencies Excellent commutation ruggedness Easy to select right parts and optimize the design Potential applications Recommended for ZVS topologies used in high density chargers, adapters, lighting and motor drives applications, etc. Product validation Qualified according to JEDEC Standard Please note: For MOSFET paralleling the use of ferrite beads on the gate or separate totem poles is generally recommended. Table 1 Key Performance Parameters Parameter Value Unit V T 650 V DS j,max R 210 m DS(on),max Q 23 nC g,typ I 42 A D,pulse E 400V 2.6 J oss Body diode diF/dt 1300 A/s ESD Class (HBM) 1C - Type / Ordering Code Package Marking Related Links IPD60R210PFD7S PG-TO 252-3 60S210D7 see Appendix A Final Data Sheet 1 Rev. 2.0, 2019-04-09600V CoolMOS PFD7 SJ Power Device IPD60R210PFD7S Table of Contents Description . 1 Maximum ratings 3 Thermal characteristics 4 Electrical characteristics . 5 Electrical characteristics diagrams . 7 Test Circuits . 11 Package Outlines . 12 Appendix A 13 Revision History 14 Trademarks . 14 Disclaimer 14 Final Data Sheet 2 Rev. 2.0, 2019-04-09