IRFB3307ZPbF IRFS3307ZPbF Applications IRFSL3307ZPbF High Efficiency Synchronous Rectification in SMPS HEXFET Power MOSFET Uninterruptible Power Supply High Speed Power Switching D V 75V DSS Hard Switched and High Frequency Circuits R typ. 4.6m DS(on) max. 5.8m G I 128A D (Silicon Limited) Benefits I 120A S D (Package Limited) Improved Gate, Avalanche and Dynamic dv/dt Ruggedness D Fully Characterized Capacitance and D D Avalanche SOA Enhanced body diode dV/dt and dI/dt S Capability S S D D G G G 2 TO-220AB D Pak TO-262 IRFB3307ZPbF IRFS3307ZPbF IRFSL3307ZPbF GD S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units I T = 25C Continuous Drain Current, V 10V (Silicon Limited) 128 D C GS I T = 100C Continuous Drain Current, VGS 10V (Silicon Limited) 90 A D C I T = 25C Continuous Drain Current, V 10V (Wire Bond Limited) 120 D C GS I Pulsed Drain Current 512 DM P T = 25C 230 W Maximum Power Dissipation D C Linear Derating Factor 1.5 W/C V 20 V GS Gate-to-Source Voltage dv/dt Peak Diode Recovery 6.7 V/ns T -55 to + 175 C J Operating Junction and T Storage Temperature Range STG Soldering Temperature, for 10 seconds 300 (1.6mm from case) Mounting torque, 6-32 or M3 screw 10lbf in (1.1N m) Avalanche Characteristics Single Pulse Avalanche Energy E 140 mJ AS (Thermally limited) Avalanche Current I See Fig. 14, 15, 22a, 22b A AR Repetitive Avalanche Energy E mJ AR Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 0.65 R Case-to-Sink, Flat Greased Surface , TO-220 0.50 C/W CS R 62 JA Junction-to-Ambient, TO-220 2 R 40 JA Junction-to-Ambient (PCB Mount) , D Pak www.irf.com 1 08/19/11 Static T = 25C (unless otherwise specified) J Symbol Parameter Min. Typ. Max. Units Conditions V Drain-to-Source Breakdown Voltage 75 V V = 0V, I = 250 A (BR)DSS GS D V /T Breakdown Voltage Temp. Coefficient 0.094 V/C Reference to 25C, I = 5mA (BR)DSS J D R Static Drain-to-Source On-Resistance 4.6 5.8 V = 10V, I = 75A DS(on) m GS D V Gate Threshold Voltage 2.0 4.0 V V = V , I = 150 A GS(th) DS GS D R Internal Gate Resistance 0.70 G(int) I Drain-to-Source Leakage Current 20 A V = 75V, V = 0V DSS DS GS 250 V = 75V, V = 0V, T = 125C DS GS J I Gate-to-Source Forward Leakage 100 nA V = 20V GSS GS Gate-to-Source Reverse Leakage -100 V = -20V GS Dynamic T = 25C (unless otherwise specified) J Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 320 S V = 50V, I = 75A DS D Q Total Gate Charge 79 110 nC I = 75A g D Q Gate-to-Source Charge 19 V = 38V gs DS Q Gate-to-Drain Mille) Charge 24 V = 10V gd GS Q Total Gate Charge Sync. (Q - Q ) 55 I = 75A, V =0V, V = 10V sync g gd D DS GS t Turn-On Delay Time 15 ns V = 49V d(on) DD t Rise Time 64 I = 75A r D t Turn-Off Delay Time 38 R = 2.6 d(off) G t Fall Time 65 V = 10V f GS C Input Capacitance 4750 pF V = 0V iss GS C Output Capacitance 420 V = 50V oss DS C Reverse Transfer Capacitance 190 = 1.0MHz rss C eff. (ER) Effective Output Capacitance (Energy Related) 440 V = 0V, V = 0V to 60V oss GS DS C eff. (TR) 410 V = 0V, V = 0V to 60V oss Effective Output Capacitance (Time Related) GS DS Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions D I Continuous Source Current A MOSFET symbol 128 S (Body Diode) showing the G I Pulsed Source Current 512 integral reverse SM S (Body Diode) p-n junction diode. V Diode Forward Voltage 1.3 V T = 25C, I = 75A, V = 0V SD J S GS t T = 25C V = 64V, Reverse Recovery Time 33 50 ns rr J R T = 125C I = 75A 39 59 J F di/dt = 100A/ s Q Reverse Recovery Charge 42 63 nC T = 25C rr J T = 125C 56 84 J I T = 25C Reverse Recovery Current 2.2 A RRM J t Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) on Calculated continuous current based on maximum allowable junction I 75A, di/dt 1570A/ s, V V , T 175C. SD DD (BR)DSS J Pulse width 400s duty cycle 2%. temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with C eff. (TR) is a fixed capacitance that gives the same charging time oss some lead mounting arrangements. as C while V is rising from 0 to 80% V . oss DS DSS Repetitive rating pulse width limited by max. junction C eff. (ER) is a fixed capacitance that gives the same energy as oss temperature. C while V is rising from 0 to 80% V . oss DS DSS Limited by T , starting T = 25C, L = 0.050mH When mounted on 1 square PCB (FR-4 or G-10 Material). For recom Jmax J mended footprint and soldering techniques refer to application note AN-994. R = 25, I = 75A, V =10V. Part not recommended for use G AS GS R is measured at T approximately 90C. J above this value. 2 www.irf.com