XRT6164AID-F MaxLinear

XRT6164A Digital Line Interface Transceiver October 2007 FEATURES z Receive Data Comparator Threshold Storage Provides Ping-Pong Operation Capability z Single 5V Supply z Loss of Signal Alarm z Compatible with CCITT G.703 64Kbps Co- z Dual Matched Driver Outputs Directional Interface Recommendation When Used With Either XRT6165 or XRT6166 z Low Power APPLICATIONS z Converts Balanced CMOS Transmit and z Data Adaption Unit (DAU) Receive Signals Propagated Over Two Twisted Pair Cables to TTL Compatible Dual-Rail Data z General Purpose TTL Compatible Line Interface z Links Remote Equipment Equipped With CCITT G.703 64Kbps Co-Directional Interfaces Over Distances Up to 500 Meters Without Equalization GENERAL DESCRIPTION The XRT6164A is a CMOS analog chip intended for general purpose line interface applications at bit rates up to 1.544Mbps (T1). It contains both receive and transmit circuitry in a 16-pin dual-in-line plastic (PDIP) package. The receiver is designed for short line applications having a cable loss up to 10dB measured at the half bit rate. The transmitter has open collector line driver outputs that are capable of handling up to 40mA. When used in conjunction with either XRT6165 or XRT6166, the chip set provides a 64Kbps codirectional interface as specified in CCITT G.703. ORDERING INFORMATION Part No. Package Operating Temperature Range XRT6164AIP 16-Lead 300 Mil PDIP -40 C to +85 C XRT6164AID 16-Lead 300 Mil JEDEC SOIC -40 C to +85 C Rev. 3.0.1 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017XRT6164A Block DIagram Positive PEAK CAP 14 Data Comparator 12 S + R RX+I/P 16 TTL Peak Threshold Buffer Detector Generator RX-I/P 1 5 S - R Negative TTL Data Buffer TCM Comparator TCM CON 15 Control 3 RX ALARM TTL Buffer 13 V A CC 2 I/P BIAS Bias GNDA 4 Open Collector Driver TX+I/P 11 10 TX + O/P TX-I/P 6 8 TX - O/P Open Collector Driver 9 V D CC GNDD 7 Figure 1. XRT6164A Block Diagram Rev. 3.0.1 2