Document Number:KL15PB Freescale Semiconductor Rev. 2, 6/2012 Product Brief KL14/KL15 Product Brief Supports all KL14 and KL15 devices Contents 1 Kinetis L Series.........................................................1 1 Kinetis L Series 2 KL14/KL15 Sub-Family Introduction......................3 The Kinetis L series is the most scalable portfolio of ultra low- power, mixed-signal ARM Cortex-M0+ MCUs in the 3 Block Diagram..........................................................3 industry. The portfolio includes 5 MCU families that offer a 4 Features.....................................................................6 broad range of memory, peripheral and package options. Kinetis L Series families share common peripherals and pin- 5 Power modes...........................................................17 counts allowing developers to migrate easily within an MCU 6 Revision History.....................................................19 family or between MCU families to take advantage of more memory or feature integration. This scalability allows developers to standardize on the Kinetis L Series for their end product platforms, maximising hardware and software reuse and reducing time-to-market. Features common to all Kinetis L series families include: 48 MHz ARM Cortex-M0+ core High-speed 12/16-bit analog-to-digital converters 12-bit digital-to-analog converters for all series except for KLx4 family High-speed analog comparators Low-power touch sensing with wake-up on touch from reduced power states for all series except for KLx4 family Powerful timers for a broad range of applications including motor control Low power focused serial communication interfaces such as low power UART, SPI, I2C etc. Single power supply: 1.71V - 3.6V with multiple low- power modes support single operation temperature: -40 ~ 105 C (exclude CSP package) 20112012 Freescale Semiconductor, Inc. Preliminary General Business InformationKinetis L Series Kinetis L series MCU families combine the latest low-power innovations with precision mixed-signal capability and a broad range of communication, connectivity, and human-machine interface peripherals. Each MCU family is supported by a market-leading enablement bundle from Freescale and numerous ARM 3rd party ecosystem partners. The KL0x family is the entry-point to the Kinetis L series and is compatible with the 8-bit S08PT family. The KL1x/2x/3x/4x families are compatible with each other and their equivalent ARM Cortex-M4 Kinetis K series families - K10/20/30/40. Program Family Packages Key Features Flash KL4x Family 64-121pin 128-256KB KL3x Family 64-121pin 64-256KB KL2x Family 32-121pin 32-256KB KL1x Family 32-80pin 32-256KB KL0x Family 16-48pin 8-32KB Low power Mixed signal USB Segment LCD Figure 1. Kinetis L series families of MCU portfolio All Kinetis L series families include a powerful array of analog, communication and timing and control peripherals with the level of feature integration increasing with flash memory size and the pin count. Features within the Kinetis L series families include: Core and Architecture: ARM Cortex-M0+ Core delivering 1.77 CoreMark/MHz from single-cycle access memories Single-cycle access to I/O and critical peripherals: Up to 50 percent faster than standard I/O, improves reaction time to external events allowing bit banging and software protocol emulation Two-stage pipeline: Reduced number of cycles per instruction (CPI), enabling faster branch instruction and ISR entry Excellent code density vs. 8-bit and 16-bit MCUs - reduces flash size, system cost and power consumption Optimized access to program memory: Accesses on alternate cycles reduces power consumption 100 percent compatible with ARM Cortex-M0 and a subset ARM Cortex-M3/M4: Reuse existing compilers and debug tools Simplified architecture: 56 instructions and 17 registers enables easy programming and efficient packaging of 8/16/32-bit data in memory Linear 4 GB address space removes the need for paging/banking, reducing software complexity ARM third-party ecosystem support: Software and tools to help minimize development time/cost Micro Trace Buffer: Lightweight trace solution allows fast bug identification and correction BME: Bit manipulation engine reduces code size and cycles for bit oriented operations to peripheral registers eliminating traditional methods where the core would need to perform read-modify-write instructions. Up to 4-channel DMA for peripheral and memory servicing with minimal CPU intervention Broad range of performance levels with CPU frequencies up to 48 MHz Ultra low-power: Next-generation 32-bit ARM Cortex M0+ core: 2x more CoreMark/mA than the closest 8/16-bit architecture KL14/KL15 Product Brief, Rev. 2, 6/2012 2 Freescale Semiconductor, Inc. Preliminary General Business Information