FDMS8662 N-Channel PowerTrench MOSFET May 2009 FDMS8662 tm N-Channel PowerTrench MOSFET 30V, 49A, 2.0m: Features General Description Max r = 2.0m : at V = 10V, I = 28A The FDMS8662 has been designed to minimize losses in power DS(on) GS D conversion application. Advancements in both silicon and Max r = 3.0m : at V = 4.5V, I = 24A DS(on) GS D package technologies have been combined to offer the lowest Advanced Package and Silicon combination r while maintaining excellent switching performance. DS(on) for low r and high efficiency DS(on) Applications MSL1 robust package design Low Side for Synchronous Buck to Power Core Processor RoHS Compliant Secondary Side Synchronous Rectifier Low Side Switch in POL DC/DC Converter Oring FET/ Load Switch Bottom Top Pin 1 S G 5 4 D S S G 6 3 S D D 7 2 S D D 8 1 D S D D Power 56 MOSFET Maximum Ratings T = 25C unless otherwise noted A Symbol Parameter Ratings Units V Drain to Source Voltage 30 V DS V Gate to Source Voltage 20 V GS Drain Current -Continuous (Package limited) T = 25C 49 C -Continuous (Silicon limited) T = 25C 159 C I A D -Continuous T = 25C (Note 1a) 28 A -Pulsed 200 E Single Pulse Avalanche Energy (Note 3) 726 mJ AS Power Dissipation T = 25C 83 C P W D Power Dissipation T = 25C (Note 1a) 2.5 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 1.5 T JC C/W R Thermal Resistance, Junction to Ambient (Note 1a) 50 T JA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS8662 FDMS8662 Power 56 13 12mm 3000units 1 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMS8662 Rev.C2 FDMS8662 N-Channel PowerTrench MOSFET Electrical Characteristics T = 25C unless otherwise noted J Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV Drain to Source Breakdown Voltage I = 250 P A, V = 0V 30 V DSS D GS BV Breakdown Voltage Temperature DSS I = 250 P A, referenced to 25C 18 mV/C D T Coefficient J I Zero Gate Voltage Drain Current V = 24V, V = 0V 1 P A DSS DS GS I Gate to Source Leakage Current V = 20V, V = 0V 100 nA GSS GS DS On Characteristics V Gate to Source Threshold Voltage V = V , I = 250 P A 1.0 1.7 3.0 V GS(th) GS DS D V Gate to Source Threshold Voltage GS(th) I = 250P A, referenced to 25C -7 mV/C D T Temperature Coefficient J V = 10V, I = 28A 1.6 2.0 GS D r Static Drain to Source On Resistance V = 4.5V, I = 24A 2.2 3.0 m : DS(on) GS D V = 10V, I = 28A, T = 125C 2.2 3.0 GS D J g Forward Transconductance V = 10V, I = 28A 207 S FS DD D Dynamic Characteristics C Input Capacitance 4825 6420 pF iss V = 15V, V = 0V, DS GS C Output Capacitance 2365 3145 pF oss f = 1MHz C Reverse Transfer Capacitance 290 435 pF rss R Gate Resistance f = 1MHz 1.1 : g Switching Characteristics t Turn-On Delay Time 17 31 ns d(on) V = 15V, I = 28A, DD D t Rise Time 10 20 ns r V = 10V, R = 6 : GS GEN t Turn-Off Delay Time 45 72 ns d(off) t Fall Time 714 ns f Q Total Gate Charge V = 0V to 10V 71 100 nC g GS V = 15V, DD Q Total Gate Charge V = 0V to 4.5V 33 47 nC g GS I = 28A D Q Gate to Source Charge 13 nC gs Q Gate to Drain Miller Charge 9 nC gd Drain-Source Diode Characteristics V = 0V, I = 2.1A (Note 3) 0.7 1.2 V GS S V Source to Drain Diode Forward Voltage SD V = 0V, I = 28A 0.8 1.2 V GS S t Reverse Recovery Time 55 88 ns rr I = 28A, di/dt = 100A/ P s F Q Reverse Recovery Charge 42 68 nC rr NOTES: 2 1. R is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R is guaranteed by design while R is determined by T JA T JC T CA the user s board design. b. 125C/W when mounted on a a. 50C/W when mounted on 2 minimum pad of 2 oz copper. a 1 in pad of 2 oz copper. 2. Starting T = 25C, L = 3mH, I = 22A, V = 30V, V = 10V. J AS DD GS 3. Pulse Test: Pulse Width < 300P s, Duty cycle < 2.0%. 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 2 FDMS8662 Rev.C2