SSM3J15FV TOSHIBA Field Effect Transistor Silicon P Channel MOS Type SSM3J15FV High-Speed Switching Applications Analog Switch Applications Optimum for high-density mounting in small packages Unit: mm Low on-resistance : RDS(ON) = 12 (max) ( VGS = 4 V) : RDS(ON) = 32 (max) ( VGS = 2.5 V) Absolute Maximum Ratings (Ta = 25C) 1.20.05 0.80.05 Characteristics Symbol Rating Unit Drain-Source voltage 30 V V DSS 1 Gate-Source voltage 20 V V GSS 3 100 DC I D Drain current mA 2 200 Pulse I DP Power dissipation (Ta = 25C) 150 P (Note 1) mW D Channel temperature 150 T C ch 55 to 150 Storage temperature range T C stg 1.GATE Note: Using continuously under heavy loads (e.g. the application of high 2.SOURCE temperature/current/voltage and the significant change in temperature, VESM 3.DRAIN etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating JEDEC temperature/current/voltage, etc.) are within the absolute maximum JEITA ratings. Please design the appropriate reliability upon reviewing the Toshiba TOSHIBA 2-1L1B Semiconductor Reliability Handbook (Handling Precautions/Derating Weight: 1.5 mg (typ.) Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on FR4 board 2 (25.4 mm 25.4 mm 1.6 mm, Cu Pad: 0.585 mm ) 0.5mm 0.45mm Marking Equivalent Circuit (top view) 0.45mm 3 3 0.4mm D Q 1 2 1 2 Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. Start of commercial production 2003-04 2017 2017-10-11 1 Toshiba Electronic Devices & Storage Corporation 1.20.05 0.80.05 0.50.05 0.4 0.4 0.220.05 0.130.05 0.320.05 SSM3J15FV Electrical Characteristics (Ta = 25C) Characteristic Symbol Test Condition MIN TYP. MAX UNIT Gate leakage current I V = 16 V, V = 0 V 1 A GSS GS DS Drain-Source breakdown voltage V I = 0.1 mA, V = 0 V 30 V (BR) DSS D GS Drain cut-off current I V = 30 V, V = 0 V 1 A DSS DS GS Gate threshold voltage V V = 3 V, I = 0.1 mA 1.1 1.7 V th DS D Forward transfer admittance Y V = 3 V, I = 10 mA (Note 2) 20 mS fs DS D I = 10 mA, V = 4 V (Note 2) 8 12 D GS Drain-Source on-resistance R DS (ON) I = 1 mA, V = 2.5 V (Note 2) 14 32 D GS Input capacitance C 9.1 pF iss Reverse transfer capacitance C V = 3 V, V = 0 V, f = 1 MHz 3.5 pF rss DS GS Output capacitance C 8.6 pF oss 65 Turn-on time t on V = 5 V, I = 10 mA, DD D Switching time ns V = 0 to 5 V GS Turn-off time t 175 off Note 2: Pulse Test Switching Time Test Circuit (a) Test circuit (b) VIN 0 V OUT 90% 0 IN 10% 5V R L 5 V 10 s V DD (c) VOUT V DS (ON) 90% V = 5 V DD Duty 1% 10% V : t , t < 5 ns IN r f V DD t t r f (Z = 50 ) out Common Source t t on off Ta = 25C Precaution Vth can be expressed as the voltage between gate and source when the low operating current value is ID = -100 A for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on) ) Please take this into consideration when using the device. 2017 2017-10-11 2 Toshiba Electronic Devices & Storage Corporation 50