IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 Definition V (V) 60 DS Advanced Process Technology R ( )V = 10 V 0.028 DS(on) GS Surface Mount (IRFZ44S, SiHFZ44S) Q (Max.) (nC) 67 Low-Profile Through-Hole (IRFZ44L, SiHFZ44L) g 175 C Operating Temperature Q (nC) 18 gs Fast Switching Q (nC) 25 gd Compliant to RoHS Directive 2002/95/EC Configuration Single DESCRIPTION Third generation Power MOSFETs from Vishay utilize D advanced processing techniques to achieve extermely low 2 2 on resistance per silicon area. This benefit, combined with I PAK (TO-262) D PAK (TO-263) the fast switching speed and ruggedized device design that power MOSFETs are well known for, provides the designer with an extermely efficient reliabel deviece for use in a wide G variety of applications. G D 2 S The D PAK is a surface mount power package capable of D S G accommodating die sizes up to HEX-4. It provides the highest power capability and lowest possible on-resistance S 2 in any existing surface mount package. The D PAK is N-Channel MOSFET suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. The through-hole version (IRFZ44L, SiHFZ44L) is available for low profile applications. ORDERING INFORMATION 2 2 2 2 Package D PAK (TO-263) D PAK (TO-263) D PAK (TO-263) I PAK (TO-262) a a Lead (Pb)-free and Halogen-free SiHFZ44S-GE3 SiHFZ44STRR-GE3 SiHFZ44STRL-GE3 - a a IRFZ44SPbF IRFZ44STRRPbF IRFZ44STRLPbF IRFZ44LPbF Lead (Pb)-free a a SiHFZ44S-E3 SiHFZ44STR-E3 SiHFZ44STL-E3 SiHFZ44L-E3 Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOLLIMITUNIT f Drain-Source Voltage V 60 DS V f V 20 Gate-Source Voltage GS e T = 25 C 50 Continuous Drain Current C V at 10 V I GS D T = 100 C 36 A Continuous Drain Current C a, e Pulsed Drain Current I 200 DM Linear Derating Factor 1.0 W/C b Single Pulse Avalanche Energy E 100 mJ AS T = 25 C 3.7 A Maximum Power Dissipation P W D T = 25 C 150 C c, f Peak Diode Recovery dV/dt dV/dt 4.5 V/ns Operating Junction and Storage Temperature Range T , T - 55 to + 175 J stg C d Soldering Recommendations (Peak Temperature ) for 10 s 300 Notes a. Repetitive rating pulse width limited by maximum junction temperature (see fig. 11). b. V = 25 V starting T = 25 C, L = 44 H, R = 25 , I = 51 A (see fig. 12). DD J g AS c. I 51 A, dI/dt 250 A/s, V V , T 175 C. SD DD DS J d. 1.6 mm from case. e. Calculated continuous current based on maximum allowable junction temperature. f. Uses IRFZ44, SiHFZ44 data and test conditions. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91293 www.vishay.com S11-1063-Rev. C, 30-May-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOLTYP. MAX. UNIT Maximum Junction-to-Ambient R -40 thJA a (PCB Mounted, steady-state) C/W Maximum Junction-to-Case R -1.0 thJC Note a. When mounted on 1 square PCB (FR-4 or G-10 material). SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOLTEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-Source Breakdown Voltage V V = 0, I = 250 A 60 - - V DS GS D V Temperature Coefficient V /T Reference to 25 C, I = 1 mA - 0.06 - V/C DS DS J D Gate-Source Threshold Voltage V V = V , I = 250 A 2.0 - 4.0 V GS(th) DS GS D Gate-Source Leakage I V = 20 V - - 100 nA GSS GS V = 60 V, V = 0 V - - 25 DS GS Zero Gate Voltage Drain Current I A DSS V = 48 V, V = 0 V, T = 150 C - - 250 DS GS J b Drain-Source On-State Resistance R V = 10 V I = 31 A - - 0.028 DS(on) GS D b Forward Transconductance g V = 25 V, I = 31 A 15 - - S fs DS D Dynamic Input Capacitance C - 1900 - iss V = 0 V, GS Output Capacitance C -V = 25 V, 920- pF oss DS d f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance C -170- rss Total Gate Charge Q -- 67 g I = 51 A, V = 48 V, D DS -- = 10 V 18 Gate-Source Charge Q V nC gs GS b see fig. 6 and 13 Gate-Drain Charge Q --25 gd Turn-On Delay Time t -14 - d(on) V = 30 V, I = 51 A, DD D Rise Time t - 110 - r R = 9.1 , R = 0,55 , ns g D b Turn-Off Delay Time t -45- d(off) see fig. 10 Fall Time t -92- f Internal Source Inductance L Between lead, and center of die contact - 7.5 - S nH Drain-Source Body Diode Characteristics MOSFET symbol D d Continuous Source-Drain Diode Current I -- 50 S showing the A integral reverse G a Pulsed Diode Forward Current I - - 200 SM p - n junction diode S b Body Diode Voltage V T = 25 C, I = 51 A, V = 0 V -- 2.5 V SD J S GS Body Diode Reverse Recovery Time t - 120 180 ns rr b, d T = 25 C, I = 51 A, dI/dt = 100 A/s J F Body Diode Reverse Recovery Charge Q - 530 800 nC rr Forward Turn-On Time t Intrinsic turn-on time is negligible (turn-on is dominated by L and L ) on S D Notes a. Repetitive rating pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s duty cycle 2 %. c. Uses IRFZ44, SiHFZ44 data and test conditions. d. Calculated continuous current based on maximum allowable junction temperature. www.vishay.com Document Number: 91293 2 S11-1063-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000