Product Information

W29N02GZSIBA

W29N02GZSIBA electronic component of Winbond

Datasheet
NAND Flash 4G-bit NAND flash, 3V x 8bit

Manufacturer: Winbond
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - Global Stock

MOQ : 1
Multiples : 1

Stock Image

W29N02GZSIBA
Winbond

1 : USD 1.082
N/A

Obsolete
0 - Global Stock

MOQ : 1
Multiples : 1

Stock Image

W29N02GZSIBA
Winbond

1 : USD 5.7714
10 : USD 3.8712
25 : USD 3.7841
50 : USD 3.7515
100 : USD 3.4253
250 : USD 3.4144
500 : USD 3.3274
1000 : USD 3.1644
5000 : USD 2.9468
N/A

Obsolete
0 - Global Stock

MOQ : 9
Multiples : 9

Stock Image

W29N02GZSIBA
Winbond

9 : USD 3.8131
N/A

Obsolete
     
Manufacturer
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W29N02GW/Z W29N02GW/Z 2G-BIT 1.8V NAND FLASH MEMORY th Release Date: August 31 2018 1 Revision F W29N02GW/Z Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 7 2. FEATURES ....................................................................................................................................... 7 3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 8 3.1 Pin Assignment 48-pin TSOP ............................................................................................... 8 3.2 Pin Assignment 63 ball VFBGA (x8) .................................................................................... 9 3.3 Pin Assignment 63 ball VFBGA (x16) ................................................................................ 10 3.4 Pin Descriptions .................................................................................................................. 11 4. PIN DESCRITPIONS ...................................................................................................................... 12 4.1 Chip Enable ( CE) .............................................................................................................. 12 4.2 Write Enable ( WE) ............................................................................................................ 12 4.3 Read Enable ( RE) ............................................................................................................ 12 4.4 Address Latch Enable (ALE) .............................................................................................. 12 4.5 Command Latch Enable (CLE) .......................................................................................... 12 4.6 Write Protect ( WP) ............................................................................................................ 12 4.7 Ready/Busy (RY/ BY) ........................................................................................................ 12 4.8 Input and Output (I/Ox) ....................................................................................................... 12 5. BLOCK DIAGRAM .......................................................................................................................... 13 6. MEMORY ARRAY ORGANIZATION .............................................................................................. 14 6.1 Array Organization (x8) ...................................................................................................... 14 6.2 Array Organization (x16) .................................................................................................... 15 7. MODE SELECTION TABLE ........................................................................................................... 16 8. COMMAND TABLE......................................................................................................................... 17 9. DEVICE OPERATIONS .................................................................................................................. 18 9.1 READ Operation ................................................................................................................. 18 9.1.1 PAGE READ (00h-30h)......................................................................................................... 18 9.1.2 TWO PLANE READ (00h-00h-30h) ...................................................................................... 18 9.1.3 RANDOM DATA OUTPUT (05h-E0h) ................................................................................... 20 9.1.4 READ ID (90h) ...................................................................................................................... 21 9.1.5 READ PARAMETER PAGE (ECh) ....................................................................................... 22 9.1.6 READ STATUS (70h)............................................................................................................ 24 9.1.7 READ STATUS ENHANCED (78h) ...................................................................................... 25 9.1.8 READ UNIQUE ID (EDh) ...................................................................................................... 27 9.2 PROGRAM Operation ........................................................................................................ 28 9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................ 28 9.2.2 SERIAL DATA INPUT (80h) .................................................................................................. 28 9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 29 9.2.4 TWO PLANE PAGE PROGRAM .......................................................................................... 29 9.3 COPY BACK Operation ...................................................................................................... 31 9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 31 9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................ 31 9.3.3 TWO PLANE READ for COPY BACK ................................................................................... 32 9.3.4 TWO PLANE PROGRAM for COPY BACK .......................................................................... 32 9.4 BLOCK ERASE Operation ................................................................................................. 36 th Release Date: August 31 2018 2 Revision F

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
Winbond Elec
WINBOND ELECTRONICS
WINBOND ELECTRONICS CORP AMERICA

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