Product Information

W29N02KVSIAF TR

W29N02KVSIAF TR electronic component of Winbond

Datasheet
NAND Flash 2G-bit Serial NAND flash, 3V, 4-bit ECC, 3V, x8

Manufacturer: Winbond
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 5.4105 ea
Line Total: USD 5.41

1449 - Global Stock
Ships to you between
Wed. 29 May to Fri. 31 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1449 - WHS 1


Ships to you between Wed. 29 May to Fri. 31 May

MOQ : 1
Multiples : 1
1 : USD 5.4105
10 : USD 4.9596
100 : USD 4.4019
250 : USD 4.4019
500 : USD 4.2833
1000 : USD 4.1291
1500 : USD 4.0104
3000 : USD 3.8087
9000 : USD 3.7968

     
Manufacturer
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Memory Size
Organisation
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Supply Voltage - Min
Supply Voltage - Max
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W29N02KVxxAF W29N02KVxxAF 2G-BIT 3.3V NAND FLASH MEMORY th Release Date: November 7 , 2018 1 Revision A W29N02KVxxAF Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................ 7 2. FEATURES .................................................................................................................................... 7 3. PACKAGE TYPES AND PIN CONFIGURATIONS ....................................................................... 8 3.1 Pin Assignment 48-pin TSOP1(x8) ....................................................................................... 8 3.2 Pin Assignment 48 ball VFBGA (x8) ..................................................................................... 9 3.3 Pin Assignment 63 ball VFBGA (x8) ................................................................................... 10 3.4 Pin Descriptions .................................................................................................................. 11 4. PIN DESCRITPIONS ................................................................................................................... 12 4.1 Chip Enable ( CE) .............................................................................................................. 12 4.2 Write Enable ( WE) ............................................................................................................ 12 4.3 Read Enable ( RE) ............................................................................................................. 12 4.4 Address Latch Enable (ALE) .............................................................................................. 12 4.5 Command Latch Enable (CLE) ........................................................................................... 12 4.6 Write Protect ( WP) ............................................................................................................ 12 4.7 Ready/Busy (RY/ BY) ........................................................................................................ 12 4.8 Input and Output (I/Ox) ....................................................................................................... 12 5. BLOCK DIAGRAM ....................................................................................................................... 13 6. MEMORY ARRAY ORGANIZATION ........................................................................................... 14 6.1 Array Organization (x8) ....................................................................................................... 14 7. MODE SELECTION TABLE ........................................................................................................ 15 8. COMMAND TABLE ...................................................................................................................... 16 9. DEVICE OPERATIONS ............................................................................................................... 17 9.1 READ Operation ................................................................................................................. 17 9.1.1 PAGE READ (00h-30h) ........................................................................................................ 17 9.1.2 TWO PLANE READ (00h-00h-30h) ...................................................................................... 17 9.1.3 RANDOM DATA OUTPUT (05h-E0h) ................................................................................... 19 9.1.4 READ ID (90h) ...................................................................................................................... 20 9.1.5 READ PARAMETER PAGE (ECh) ....................................................................................... 21 9.1.6 READ STATUS (70h) ........................................................................................................... 23 9.1.7 READ STATUS ENHANCED (78h) ...................................................................................... 25 9.1.8 READ UNIQUE ID (EDh) ...................................................................................................... 26 9.2 PROGRAM Operation ........................................................................................................ 27 9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................ 27 9.2.2 SERIAL DATA INPUT (80h) ................................................................................................. 27 9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 28 9.2.4 TWO PLANE PAGE PROGRAM .......................................................................................... 29 9.3 COPY BACK Operation ...................................................................................................... 30 9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 30 9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................ 31 9.3.3 TWO PLANE READ for COPY BACK ................................................................................... 32 9.3.4 TWO PLANE PROGRAM for COPY BACK .......................................................................... 32 9.4 BLOCK ERASE Operation .................................................................................................. 36 9.4.1 BLOCK ERASE (60h-D0h) ................................................................................................... 36 th Release Date: November 7 , 2018 2 Revision A

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
Winbond Elec
WINBOND ELECTRONICS
WINBOND ELECTRONICS CORP AMERICA

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