IRFB4310ZPbF IRFS4310ZPbF IRFSL4310ZPbF HEXFET Power MOSFET Applications D V 100V DSS High Efficiency Synchronous Rectification in SMPS R typ. 4.8m DS(on) Uninterruptible Power Supply High Speed Power Switching max. 6.0m Hard Switched and High Frequency Circuits G I 127A D (Silicon Limited) I 120A S D (Package Limited) Benefits Improved Gate, Avalanche and Dynamic dV/dt D Ruggedness D D Fully Characterized Capacitance and Avalanche SOA S S S Enhanced body diode dV/dt and dI/dt Capability D D D G G G Lead-Free 2 D Pak TO-220AB TO-262 IRFS4310ZPbF IRFB4310ZPbF IRFSL4310ZPbF GD S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units I T = 25C Continuous Drain Current, V 10V (Silicon Limited) 127 A D C GS I T = 100C Continuous Drain Current, V 10V (Silicon Limited) 90 D C GS I T = 25C Continuous Drain Current, V 10V (Wire Bond Limited) 120 D C GS I Pulsed Drain Current 560 DM T = 25C P Maximum Power Dissipation 250 W D C 1.7 Linear Derating Factor W/C V 20 Gate-to-Source Voltage V GS 18 Peak Diode Recovery dv/dt V/ns T -55 to + 175 Operating Junction and C J T Storage Temperature Range STG Soldering Temperature, for 10 seconds 300 (1.6mm from case) Mounting torque, 6-32 or M3 screw 10lb in (1.1N m) Avalanche Characteristics Single Pulse Avalanche Energy E 475 mJ AS (Thermally limited) Avalanche Current I See Fig. 14, 15, 22a, 22b, A AR Repetitive Avalanche Energy E mJ AR Thermal Resistance Symbol Parameter Typ. Max. Units R Junction-to-Case 0.6 JC R Case-to-Sink, Flat Greased Surface , TO-220 0.50 C/W CS R Junction-to-Ambient, TO-220 62 JA 2 R 40 JA Junction-to-Ambient (PCB Mount) , D Pak www.irf.com 1 4/23/12 Static T = 25C (unless otherwise specified) J Symbol Parameter Min. Typ. Max. Units Conditions V Drain-to-Source Breakdown Voltage 100 V V = 0V, I = 250 A (BR)DSS GS D / T V Breakdown Voltage Temp. Coefficient 0.11 V/C Reference to 25C, I = 5mA (BR)DSS J D R Static Drain-to-Source On-Resistance 4.8 6.0 m V = 10V, I = 75A DS(on) GS D V Gate Threshold Voltage 2.0 4.0 V V = V , I = 150 A GS(th) DS GS D I Drain-to-Source Leakage Current 20 A V = 100V, V = 0V DSS DS GS 250 V = 80V, V = 0V, T = 125C DS GS J I Gate-to-Source Forward Leakage 100 nA V = 20V GSS GS Gate-to-Source Reverse Leakage -100 V = -20V GS R Internal Gate Resistance 0.7 G Dynamic T = 25C (unless otherwise specified) J Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 150 S V = 50V, I = 75A DS D Q Total Gate Charge 120 170 nC I = 75A g D Q Gate-to-Source Charge 29 V =50V gs DS Q Gate-to-Drain Mille) Charge 35 V = 10V gd GS Q Total Gate Charge Sync. (Q - Q ) 85 I = 75A, V =0V, V = 10V sync g gd D DS GS t Turn-On Delay Time 20 ns V = 65V d(on) DD t Rise Time 60 I = 75A r D t Turn-Off Delay Time 55 R = 2.7 d(off) G t Fall Time 57 V = 10V f GS C Input Capacitance 6860 pF V = 0V iss GS C Output Capacitance 490 V = 50V oss DS C Reverse Transfer Capacitance 220 = 1.0MHz, See Fig. 5 rss C eff. (ER) 570 V = 0V, V = 0V to 80V , See Fig. 11 Effective Output Capacitance (Energy Related) oss GS DS C eff. (TR) 920 V = 0V, V = 0V to 80V oss Effective Output Capacitance (Time Related) GS DS Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions I Continuous Source Current 127 A MOSFET symbol D S (Body Diode) showing the G I Pulsed Source Current 560 A integral reverse SM S (Body Diode) p-n junction diode. V Diode Forward Voltage 1.3 V T = 25C, I = 75A, V = 0V SD J S GS t Reverse Recovery Time 40 ns T = 25C V = 85V, rr J R 49 T = 125C I = 75A J F di/dt = 100A/ s Q Reverse Recovery Charge 58 nC T = 25C rr J 89 T = 125C J T = 25C I Reverse Recovery Current 2.5 A RRM J t Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) on Calculated continuous current based on maximum allowable junction Pulse width 400s duty cycle 2%. temperature. Bond wire current limit is 120A. Note that current C eff. (TR) is a fixed capacitance that gives the same charging time oss limitations arising from heating of the device leads may occur with as C while V is rising from 0 to 80% V . oss DS DSS some lead mounting arrangements. C eff. (ER) is a fixed capacitance that gives the same energy as oss Repetitive rating pulse width limited by max. junction C while V is rising from 0 to 80% V . oss DS DSS temperature. When mounted on 1 square PCB (FR-4 or G-10 Material). For recom Limited by T , starting T = 25C, L = 0.28mH mended footprint and soldering techniques refer to application note AN-994. Jmax J R = 25 , I = 58A, V =10V. Part not recommended for use G AS GS above the Eas value and test conditions. I 75A, di/dt 600A/s, V V , T 175C. SD DD (BR)DSS J 2 www.irf.com