MDV5524URH Magnachip

MDV5524 Asymmetric Dual N-Channel Trench MOSFET 30V MDV5524 Asymmetric Dual N-channel Trench MOSFET 30V General Description Features The MDV5524 uses advanced MagnaChip s MOSFET FET1 FET2 Technology, which provides high performance in on-state V = 30V V = 30V DS DS resistance, fast switching performance and excellent I = 24.5A I = 31.2A V = 10V D D GS quality. MDV5524 is suitable for DC/DC converter and R DS(ON) general purpose applications. < 14.4m < 12.6m V = 10V GS < 21.3m < 15.6m V = 4.5V GS 100% UIL Tested 100% Rg Tested D D1 S2 S2 S2 5 6 G2 7 8 S1/D2 G G1 D1 D SS1/D2 4 3 2 D1 1 D1 D1 G1 G G2 SS2 o Absolute Maximum Ratings (Ta = 25 C) Characteristics Symbol FET1 FET2 Unit Drain-Source Voltage V 30 V DSS Gate-Source Voltage V 20 12 V GSS o T =25 C 24.5 31.2 C o T =100 C 15.5 19.7 C (1) Continuous Drain Current I A D o T =25 C 8.5 9.9 A o T =70 C 6.8 7.9 A Pulsed Drain Current I 100 125 A DM o T =25 C 14.7 20.8 C o T =100 C 5.9 8.3 C Power Dissipation P W D o T =25 C 1.8 2.1 A o T =70 C 1.1 1.3 A (2) Single Pulse Avalanche Energy E 12.1 25.6 mJ AS o Junction and Storage Temperature Range T , T -55~150 C J stg Thermal Characteristics Characteristics Symbol FET1 FET2 Unit (1) Thermal Resistance, Junction-to-Ambient R 70 60 JA o C/W Thermal Resistance, Junction-to-Case R 8.5 6.0 JC 1 Apr 2012. Version 1.2 MagnaChip Semiconductor Ltd. MDV5524 Asymmetric Dual N-Channel Trench MOSFET 30V Ordering Information Part Number Temp. Range Package Packing Rohs Status o MDV5524URH -55~150 C Dual PDFN33 Tape & Reel Halogen Free o FET1 Electrical Characteristics (Ta =25 C) Characteristics Symbol Test Condition Min Typ Max Unit Static Characteristics Drain-Source Breakdown Voltage BV I = 250A, V = 0V 30 - - DSS D GS V Gate Threshold Voltage V V = V , I = 250A 1.3 1.8 2.4 GS(th) DS GS D Drain Cut-Off Current I V = 30.0V, V = 0V - - 1 DSS DS GS A Gate Leakage Current I V = 20.0V, V = 0V - - 0.1 GSS GS DS V = 10.0V, I = 6.0A - 12.0 14.4 GS D Drain-Source ON Resistance R m DS(ON) V = 4.5V, I = 5.0A - 17.0 21.3 GS D Forward Transconductance g V = 5.0V, I = 6.0A - 19.5 - S fs DS D Dynamic Characteristics Total Gate Charge Q 5.7 7.2 8.6 g(10V) Total Gate Charge Q 2.8 3.6 4.3 g(4.5V) V = 15.0V, I = 6.0A, DS D nC V = 10.0V GS Gate-Source Charge Q - 1.4 - gs Gate-Drain Charge Q - 1.2 - gd Input Capacitance C 290 386 483 iss V = 15.0V, V = 0V, DS GS Reverse Transfer Capacitance C 68 91 113 pF osss f = 1.0MHz Output Capacitance C 35 47 60 rss Turn-On Delay Time t - 6.7 - d(on) Rise Time t - 10.2 - r V =15.0V, I =6.0A, DD D ns V =10.0V, R =6.0 GS g Turn-Off Delay Time t - 17.3 - d(off) Fall Time t - 6.5 - f Gate Resistance Rg f=1 MHz - 3.0 - Drain-Source Body Diode Characteristics Source-Drain Diode Forward Voltage V I = 1.0A, V = 0V - 0.7 1.2 V SD S GS Body Diode Reverse Recovery Time t - 16.0 20.0 ns rr I = 6.0A, dl/dt = 100A/s F Body Diode Reverse Recovery Charge Q - 8.0 10.0 nC rr Note : 1. Surface mounted FR-4 board by JEDEC (jesd51-7). Continuous current at T =25 is silicon limited. C 2. EAS is tested at starting Tj = 25 , L = 0.1mH, IAS = 11.0A, VDD = 27V, VGS = 10V (100% UIL Test). 2 Apr 2012. Version 1.2 MagnaChip Semiconductor Ltd.