650V-45mW SiC FET Rev. B, January 2020 DATASHEET Description This SiC FET device is based on a unique cascode circuit UF3SC065040D8S configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device. The devices standard gate-drive characteristics allows for a true drop-in replacement to Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction devices. Available in the DFN8X8-4L package, this device exhibits ultra-low gate charge and exceptional reverse recovery characteristics, making it ideal for switching inductive loads , and any application requiring standard gate drive. D (TAB) Features w Typical on-resistance R of 45mW DS(on),typ 1 w Maximum operating temperature of 150C G (1) w Excellent reverse recovery w Low gate charge KS (2) 1 2 3 w Low intrinsic capacitance S (3,4) 4 w ESD protected, HBM class 2 w DFN8X8-4L package for faster switching, clean gate waveforms Typical applications Part Number Package Marking w EV charging UF3SC065040D8S DFN8X8-4L UF3SC065040D8S w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3SC065040D8S Rev. B, January 2020 1Maximum Ratings Parameter Symbol Test Conditions Value Units Drain-source voltage V 650 V DS Gate-source voltage V DC -25 to +25 V GS 1 T < 120C I 18 A Continuous drain current C D 2 I T = 25C Pulsed drain current 110 A DM C 3 E L=15mH, I =3.19A Single pulsed avalanche energy 76 mJ AS AS Power dissipation P T = 25C 125 W tot C Maximum junction temperature T 150 C J,max Operating and storage temperature T , T -55 to 150 C J STG Reflow soldering temperature T reflow MSL 3 260 C solder 1. Limited by bondwires 2. Pulse width t limited by T p J,max 3. Starting T = 25C J Thermal Characteristics Value Parameter Symbol Test Conditions Units Min Typ Max Thermal resistance, junction-to-case R 0.8 1 C/W qJC Datasheet: UF3SC065040D8S Rev. B, January 2020 2